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| author | Elyes HAOUAS <ehaouas@noos.fr> | 2018-10-05 10:36:45 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-10-08 09:46:16 +0000 |
| commit | 88607a4b1002ed6acc7f316f274feea2fd861095 (patch) | |
| tree | e004c85f36109da78872b88875d4f0ea1c30aaff /src/soc/nvidia/tegra210/dc.c | |
| parent | d9169f826a3c19a7380a7d73c7126e52eb62e77d (diff) | |
| download | coreboot-88607a4b1002ed6acc7f316f274feea2fd861095.tar.xz | |
src: Use tabs for indentation
Change-Id: I6b40aaf5af5d114bbb0cd227dfd50b0ee19eebba
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/28934
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/nvidia/tegra210/dc.c')
| -rw-r--r-- | src/soc/nvidia/tegra210/dc.c | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/src/soc/nvidia/tegra210/dc.c b/src/soc/nvidia/tegra210/dc.c index b892c602b3..10003463c0 100644 --- a/src/soc/nvidia/tegra210/dc.c +++ b/src/soc/nvidia/tegra210/dc.c @@ -25,26 +25,26 @@ int dump = 0; unsigned long READL(void *p) { - unsigned long value; + unsigned long value; /* * In case of hard hung on readl(p), we can set dump > 1 to print out * the address accessed. */ - if (dump > 1) + if (dump > 1) printk(BIOS_SPEW, "readl %p\n", p); - value = read32(p); - if (dump) + value = read32(p); + if (dump) printk(BIOS_SPEW, "readl %p %08lx\n", p, value); - return value; + return value; } void WRITEL(unsigned long value, void *p) { - if (dump) + if (dump) printk(BIOS_SPEW, "writel %p %08lx\n", p, value); - write32(p, value); + write32(p, value); } /* return in 1000ths of a Hertz */ @@ -76,7 +76,7 @@ static void print_mode(const struct soc_nvidia_tegra210_config *config) } int update_display_mode(struct display_controller *disp_ctrl, - struct soc_nvidia_tegra210_config *config) + struct soc_nvidia_tegra210_config *config) { print_mode(config); @@ -124,7 +124,7 @@ int update_display_mode(struct display_controller *disp_ctrl, } void update_display_shift_clock_divider(struct display_controller *disp_ctrl, - u32 shift_clock_div) + u32 shift_clock_div) { WRITEL((PIXEL_CLK_DIVIDER_PCD1 << PIXEL_CLK_DIVIDER_SHIFT) | (shift_clock_div & 0xff) << SHIFT_CLK_DIVIDER_SHIFT, |