diff options
| author | Julius Werner <jwerner@chromium.org> | 2016-02-09 22:47:11 -0800 |
|---|---|---|
| committer | Julius Werner <jwerner@chromium.org> | 2016-02-12 21:58:34 +0100 |
| commit | ce8c4bfc718afdf82645743fbba41fdd814f6102 (patch) | |
| tree | fa65643bea7615f33a02601382ec034ecc2aac0b /src/soc/nvidia/tegra210/include/soc/memlayout.ld | |
| parent | 8c09377deab1b5a5120889bb6c689ad460381c29 (diff) | |
| download | coreboot-ce8c4bfc718afdf82645743fbba41fdd814f6102.tar.xz | |
tegra132/210: Remove memlayout_vboot2.ld
Having two separate memlayouts is an unnecessary complication.
Contributors need to make sure that their code fits into the vboot one
(with smaller stage sizes) either way, and the Tegras have plenty of
SRAM anyway. Let's just make the vboot layout the default (as it was
done on other SoCs) to keep things easier to maintain. The empty SRAM
holes on non-vboot systems where the verstage and work buffer would've
been won't hurt them.
BRANCH=None
BUG=None
TEST=Ran abuild with and without --chromeos on Foster, Rush, Ryu and
Smaug.
Change-Id: If37228facb4de1459cc720dca10bf03e04eb9930
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/13667
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/soc/nvidia/tegra210/include/soc/memlayout.ld')
| -rw-r--r-- | src/soc/nvidia/tegra210/include/soc/memlayout.ld | 14 |
1 files changed, 8 insertions, 6 deletions
diff --git a/src/soc/nvidia/tegra210/include/soc/memlayout.ld b/src/soc/nvidia/tegra210/include/soc/memlayout.ld index 00ecd28224..c1c581bf71 100644 --- a/src/soc/nvidia/tegra210/include/soc/memlayout.ld +++ b/src/soc/nvidia/tegra210/include/soc/memlayout.ld @@ -29,15 +29,17 @@ SECTIONS { SRAM_START(0x40000000) PRERAM_CBMEM_CONSOLE(0x40000000, 8K) - PRERAM_CBFS_CACHE(0x40002000, 84K) + PRERAM_CBFS_CACHE(0x40002000, 36K) + VBOOT2_WORK(0x4000B000, 12K) #if ENV_ARM64 - STACK(0x40017000, 8K) + STACK(0x4000E000, 3K) #else /* AVP gets a separate stack to avoid any chance of handoff races. */ - STACK(0x40019000, 8K) + STACK(0x4000EC00, 3K) #endif - TIMESTAMP(0x4001B000, 2K) - BOOTBLOCK(0x4001B800, 24K) - ROMSTAGE(0x40022000, 120K) + TIMESTAMP(0x4000F800, 2K) + BOOTBLOCK(0x40010000, 28K) + VERSTAGE(0x40017000, 64K) + ROMSTAGE(0x40027000, 100K) SRAM_END(0x40040000) DRAM_START(0x80000000) |