diff options
| author | Tom Warren <twarren@nvidia.com> | 2015-06-30 10:22:12 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-07-07 17:21:53 +0200 |
| commit | faa76f5548297ce246b84fe9a1aa6cbff2ff9fdb (patch) | |
| tree | b075868504eab5444e1d9f338d6a3c214bc2e64d /src/soc/nvidia/tegra210/include | |
| parent | fd5398fcddb0391f8fcee4382f70c41c3c44ae1e (diff) | |
| download | coreboot-faa76f5548297ce246b84fe9a1aa6cbff2ff9fdb.tar.xz | |
T210: UTMIP: Correct UTMIP PLL programming as per Mark Kuo
BUG=chrome-os-partner:39603
BRANCH=none
TEST=Built OK for Smaug.
Change-Id: Iba170d8ad6f1dff111421fd61f71da19de57efaa
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 1bf1c1442dacf45bac5d55b05ada99a2c96f2e45
Original-Change-Id: Iecf04691a637b56e2f2287ab7d4d0cdda0382421
Original-Signed-off-by: Tom Warren <twarren@nvidia.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/282720
Original-Reviewed-by: Andrew Bresticker <abrestic@chromium.org>
Original-Reviewed-by: Mark Kuo <mkuo@nvidia.com>
Reviewed-on: http://review.coreboot.org/10814
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc/nvidia/tegra210/include')
| -rw-r--r-- | src/soc/nvidia/tegra210/include/soc/clk_rst.h | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/src/soc/nvidia/tegra210/include/soc/clk_rst.h b/src/soc/nvidia/tegra210/include/soc/clk_rst.h index 60ee112d5e..817a041422 100644 --- a/src/soc/nvidia/tegra210/include/soc/clk_rst.h +++ b/src/soc/nvidia/tegra210/include/soc/clk_rst.h @@ -428,14 +428,19 @@ enum { #define UTMIP_CFG1_FORCE_PLL_ACTIVE_POWERDOWN_DISABLE (0 << 12) #define UTMIP_CFG1_FORCE_PLL_ENABLE_POWERDOWN_DISABLE (0 << 14) #define UTMIP_CFG1_FORCE_PLL_ENABLE_POWERUP_ENABLE (1 << 15) -#define UTMIP_CFG1_FORCE_PLLU_POWERDOWN_ENABLE (1 << 16) +#define UTMIP_CFG1_FORCE_PLLU_POWERDOWN_ENABLE (1 << 16) #define UTMIP_CFG1_PLLU_ENABLE_DLY_COUNT_SHIFT (27) #define UTMIP_CFG2_FORCE_PD_SAMP_A_POWERDOWN_DISABLE (0 << 0) +#define UTMIP_CFG2_FORCE_PD_SAMP_A_POWERUP_ENABLE (1 << 1) #define UTMIP_CFG2_FORCE_PD_SAMP_B_POWERDOWN_DISABLE (0 << 2) +#define UTMIP_CFG2_FORCE_PD_SAMP_B_POWERUP_ENABLE (1 << 3) #define UTMIP_CFG2_FORCE_PD_SAMP_C_POWERDOWN_DISABLE (0 << 4) +#define UTMIP_CFG2_FORCE_PD_SAMP_C_POWERUP_ENABLE (1 << 5) +#define UTMIP_CFG2_FORCE_PD_SAMP_D_POWERDOWN_DISABLE (0 << 24) +#define UTMIP_CFG2_FORCE_PD_SAMP_D_POWERUP_ENABLE (1 << 25) #define UTMIP_CFG2_PLLU_STABLE_COUNT_SHIFT (6) #define UTMIP_CFG2_PLL_ACTIVE_DLY_COUNT_SHIFT (18) -#define UTMIP_CFG2_PHY_XTAL_CLOCKEN (1U << 30) +#define UTMIP_CFG2_PHY_XTAL_CLOCKEN (1U << 30) /* Generic, indiscriminate divisor mask. May catch some innocent bystander bits * on the side that we don't particularly care about. */ |