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authorDavid Hendricks <dhendrix@chromium.org>2015-07-30 18:49:48 -0700
committerPatrick Georgi <pgeorgi@google.com>2015-08-28 06:42:03 +0000
commit7dbf9c6747ccdfa8b993d3843a22722742957611 (patch)
treea069e96ccfc13888c6df8a3d91a5864fc8acbc8e /src/soc/nvidia/tegra210
parenta3b898aaf0ddf48fc3a577f4c39dd1d8acf31b6f (diff)
downloadcoreboot-7dbf9c6747ccdfa8b993d3843a22722742957611.tar.xz
edid: Use edid_mode struct to reduce redundancy
This replaces various timing mode parameters parameters with an edid_mode struct within the edid struct. BUG=none BRANCH=firmware-veyron TEST=built and booted on Mickey, saw display come up, also compiled for link,falco,peppy,rambi,nyan_big,rush,smaug [pg: extended to also cover peach_pit, daisy and lenovo/t530] Change-Id: Icd0d67bfd3c422be087976261806b9525b2b9c7e Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Original-Commit-Id: abcbf25c81b25fadf71cae106e01b3e36391f5e9 Original-Change-Id: I1bfba5b06a708d042286db56b37f67302f61fff6 Original-Signed-off-by: David Hendricks <dhendrix@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/289964 Original-Reviewed-by: Yakir Yang <ykk@rock-chips.com> Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-on: http://review.coreboot.org/11388 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc/nvidia/tegra210')
-rw-r--r--src/soc/nvidia/tegra210/dp.c18
1 files changed, 9 insertions, 9 deletions
diff --git a/src/soc/nvidia/tegra210/dp.c b/src/soc/nvidia/tegra210/dp.c
index ea6dbca74c..e0475842e3 100644
--- a/src/soc/nvidia/tegra210/dp.c
+++ b/src/soc/nvidia/tegra210/dp.c
@@ -1367,18 +1367,18 @@ static void tegra_dp_update_config(struct tegra_dc_dp_data *dp,
return;
}
- config->xres = config->display_xres = edid.ha;
- config->yres = config->display_yres = edid.va;
+ config->xres = config->display_xres = edid.mode.ha;
+ config->yres = config->display_yres = edid.mode.va;
- config->pixel_clock = edid.pixel_clock * 1000;
+ config->pixel_clock = edid.mode.pixel_clock * 1000;
- config->hfront_porch = edid.hso;
- config->hsync_width = edid.hspw;
- config->hback_porch = edid.hbl - edid.hso - edid.hspw;
+ config->hfront_porch = edid.mode.hso;
+ config->hsync_width = edid.mode.hspw;
+ config->hback_porch = edid.mode.hbl - edid.mode.hso - edid.mode.hspw;
- config->vfront_porch = edid.vso;
- config->vsync_width = edid.vspw;
- config->vback_porch = edid.vbl - edid.vso - edid.vspw;
+ config->vfront_porch = edid.mode.vso;
+ config->vsync_width = edid.mode.vspw;
+ config->vback_porch = edid.mode.vbl - edid.mode.vso - edid.mode.vspw;
/**
* Note edid->framebuffer_bits_per_pixel is currently hard-coded as 32,