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authorPaul Kocialkowski <contact@paulk.fr>2016-05-07 14:30:24 +0200
committerStefan Reinauer <stefan.reinauer@coreboot.org>2016-05-09 07:48:56 +0200
commit0dcd41739ffb04f4f1eb3dfe9ab54892a68ba83a (patch)
tree57f508033fdc291af35fb13718715a726e7c9006 /src/soc/nvidia/tegra210
parent536f5a7eb9c8332ec4e0e0058cdd532a364caadd (diff)
downloadcoreboot-0dcd41739ffb04f4f1eb3dfe9ab54892a68ba83a.tar.xz
tegra132, tegra210: Align the framebuffer's bytes-per-line to 64
It turns out that tegra132 and tegra 210 need the framebuffer's bytes-per-line to be aligned to 64 for proper display. This behaviour was default before moving to edid_set_framebuffer_bits_per_pixel. Change-Id: I46dadcf36e1c50e9649121ee6fa9cdf6134a531e Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-on: https://review.coreboot.org/14734 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc/nvidia/tegra210')
-rw-r--r--src/soc/nvidia/tegra210/dc.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/nvidia/tegra210/dc.c b/src/soc/nvidia/tegra210/dc.c
index 39f9be0491..b54614f2fe 100644
--- a/src/soc/nvidia/tegra210/dc.c
+++ b/src/soc/nvidia/tegra210/dc.c
@@ -230,7 +230,7 @@ void pass_mode_info_to_payload(
edid.mode.va = config->display_yres;
edid.mode.ha = config->display_xres;
edid_set_framebuffer_bits_per_pixel(&edid,
- config->framebuffer_bits_per_pixel, 0);
+ config->framebuffer_bits_per_pixel, 64);
printk(BIOS_INFO, "%s: bytes_per_line: %d, bits_per_pixel: %d\n "
" x_res x y_res: %d x %d, size: %d\n",