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authorJulius Werner <jwerner@chromium.org>2018-08-07 14:02:55 -0700
committerJulius Werner <jwerner@chromium.org>2018-08-10 04:16:06 +0000
commit73be9dd82c033a9bce3fc7ff11dab453e9cfde82 (patch)
tree3515ee34380e7e672ad65d631a2d54c1e45f7f56 /src/soc/nvidia/tegra210
parentaf7f9eeddf1e2ffcc17c7a1840aaee76acf9aa8d (diff)
downloadcoreboot-73be9dd82c033a9bce3fc7ff11dab453e9cfde82.tar.xz
arm64: Remove set_cntfrq() function
CNTFRQ_EL0 is a normal AArch64 architectural register like hundreds of others that are all accessed through the raw_(read|write)_${register}() family of functions. There's no reason why this register in particular should have an inconsistent accessor, so replace all instances of set_cntfrq() with raw_write_cntfrq_el0() and get rid of it. Change-Id: I599519ba71c287d4085f9ad28d7349ef0b1eea9b Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/27947 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/nvidia/tegra210')
-rw-r--r--src/soc/nvidia/tegra210/ramstage.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/nvidia/tegra210/ramstage.c b/src/soc/nvidia/tegra210/ramstage.c
index 18fdded800..86fae67c43 100644
--- a/src/soc/nvidia/tegra210/ramstage.c
+++ b/src/soc/nvidia/tegra210/ramstage.c
@@ -13,8 +13,8 @@
* GNU General Public License for more details.
*/
-#include <arch/clock.h>
#include <arch/cpu.h>
+#include <arch/lib_helpers.h>
#include <arch/stages.h>
#include <gic.h>
#include <soc/addressmap.h>
@@ -26,7 +26,7 @@ static void arm64_arch_timer_init(void)
{
uint32_t freq = clock_get_osc_khz() * 1000;
// Set the cntfrq register.
- set_cntfrq(freq);
+ raw_write_cntfrq_el0(freq);
}
static void mselect_enable_wrap(void)