arm64: Remove cpu intialization through device-tree

Since, SMP support is removed for ARM64, there is no need for CPU
initialization to be performed via device-tree.

Change-Id: I0534e6a93c7dc8659859eac926d17432d10243aa
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: http://review.coreboot.org/11913
Tested-by: build bot (Jenkins)
Reviewed-by: Julius Werner <jwerner@chromium.org>

2 files changed, 17 insertions, 43 deletions

diff --git a/src/soc/nvidia/tegra210/ramstage.c b/src/soc/nvidia/tegra210/ramstage.c
index f55c256a25..5c375106a2 100644
--- a/src/soc/nvidia/tegra210/ramstage.c
+++ b/src/soc/nvidia/tegra210/ramstage.c
@@ -19,6 +19,7 @@
 #include <soc/addressmap.h>
 #include <soc/clock.h>
 #include <soc/mmu_operations.h>
+#include <soc/mtc.h>
 
 void arm64_arch_timer_init(void)
 {
@@ -54,4 +55,9 @@ void arm64_soc_init(void)
 	trustzone_region_init();
 
 	tegra210_mmu_init();
+
+	clock_init_arm_generic_timer();
+
+	if (tegra210_run_mtc() != 0)
+		printk(BIOS_ERR, "MTC: No training data.\n");
 }
diff --git a/src/soc/nvidia/tegra210/soc.c b/src/soc/nvidia/tegra210/soc.c
index bcbef49d10..1071d68b60 100644
--- a/src/soc/nvidia/tegra210/soc.c
+++ b/src/soc/nvidia/tegra210/soc.c
@@ -27,7 +27,6 @@
 #include <soc/clock.h>
 #include <soc/cpu.h>
 #include <soc/mc.h>
-#include <soc/mtc.h>
 #include <soc/nvidia/tegra/apbmisc.h>
 #include <string.h>
 #include <timer.h>
@@ -58,30 +57,11 @@ static void soc_read_resources(device_t dev)
 	ram_resource(dev, index++, begin * KiB, size * KiB);
 }
 
-static void soc_init(device_t dev)
-{
-	clock_init_arm_generic_timer();
-
-	arch_initialize_cpu(dev);
-
-	if (!IS_ENABLED(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT))
-		return;
-
-	if (display_init_required())
-		display_startup(dev);
-	else
-		printk(BIOS_INFO, "Skipping display init.\n");
-}
-
-static void soc_noop(device_t dev)
-{
-}
-
 static struct device_operations soc_ops = {
 	.read_resources   = soc_read_resources,
-	.set_resources    = soc_noop,
-	.enable_resources = soc_noop,
-	.init             = soc_init,
+	.set_resources    = DEVICE_NOOP,
+	.enable_resources = DEVICE_NOOP,
+	.init             = DEVICE_NOOP,
 	.scan_bus         = NULL,
 };
 
@@ -89,6 +69,14 @@ static void enable_tegra210_dev(device_t dev)
 {
 	if (dev->path.type == DEVICE_PATH_CPU_CLUSTER)
 		dev->ops = &soc_ops;
+
+	if (!IS_ENABLED(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT))
+		return;
+
+	if (display_init_required())
+		display_startup(dev);
+	else
+		printk(BIOS_INFO, "Skipping display init.\n");
 }
 
 static void tegra210_init(void *chip_info)
@@ -111,26 +99,6 @@ struct chip_operations soc_nvidia_tegra210_ops = {
 	.enable_dev = enable_tegra210_dev,
 };
 
-static void tegra210_cpu_init(device_t cpu)
-{
-	if (tegra210_run_mtc() != 0)
-		printk(BIOS_ERR, "MTC: No training data.\n");
-}
-
-static const struct cpu_device_id ids[] = {
-	{ 0x411fd071 },
-	{ CPU_ID_END },
-};
-
-static struct device_operations cpu_dev_ops = {
-	.init = tegra210_cpu_init,
-};
-
-static const struct cpu_driver driver __cpu_driver = {
-	.ops      = &cpu_dev_ops,
-	.id_table = ids,
-};
-
 static void enable_plld(void *unused)
 {
 	/*