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| author | Furquan Shaikh <furquan@google.com> | 2014-07-22 17:21:14 -0700 |
|---|---|---|
| committer | Marc Jones <marc.jones@se-eng.com> | 2015-03-13 00:18:59 +0100 |
| commit | d123f865ad06d788a05fe1391ef8861671d0b2da (patch) | |
| tree | ccd2d602c1fa350bb4e56ee217ff23b7af2ed44e /src/soc/nvidia | |
| parent | 9ad04c61e908e9587ebbc4a5b45b0f4d531ba02e (diff) | |
| download | coreboot-d123f865ad06d788a05fe1391ef8861671d0b2da.tar.xz | |
coreboot t132: Stop running AVP at the end of romstage
Stop running AVP at the end of romstage until event conditions are met (JTAG,
GIC_IRQ or LIC_IRQ).
BUG=chrome-os-partner:30831
BRANCH=None
TEST=Compiles successfully and boots till last known good checkpoint.
Original-Change-Id: Ia221f08b27ac0c60a66d588e351677144cc6a322
Original-Signed-off-by: Furquan Shaikh <furquan@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/209424
Original-Tested-by: Furquan Shaikh <furquan@chromium.org>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org>
(cherry picked from commit df4e8b4c8a1002443a936bd0563fbc9e0710f489)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Change-Id: I59f7702bd50a1039b8723e9cb12b8d714e353d37
Reviewed-on: http://review.coreboot.org/8651
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/soc/nvidia')
| -rw-r--r-- | src/soc/nvidia/tegra132/romstage.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/soc/nvidia/tegra132/romstage.c b/src/soc/nvidia/tegra132/romstage.c index 4b1c8431eb..812d14798c 100644 --- a/src/soc/nvidia/tegra132/romstage.c +++ b/src/soc/nvidia/tegra132/romstage.c @@ -29,6 +29,8 @@ #include "sdram.h" #include "ccplex.h" +#include <soc/clock.h> + void romstage(void); void romstage(void) { @@ -71,5 +73,5 @@ void romstage(void) ccplex_cpu_start(entry); - while (1); + clock_halt_avp(); } |