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| author | Ting Shen <phoenixshen@google.com> | 2019-01-28 18:15:00 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-02-05 13:41:45 +0000 |
| commit | dff29e0c65462258776b8fb821516faad3ec1394 (patch) | |
| tree | a711cd01310f677a54f6497be8f8f071b96be54c /src/soc/nvidia | |
| parent | 4929f4361936bcc994044dea5c79619746384d5e (diff) | |
| download | coreboot-dff29e0c65462258776b8fb821516faad3ec1394.tar.xz | |
bootmem: add new memory type for BL31
After CL:31122, we can finally define a memory type specific for BL31,
to make sure BL31 is not loaded on other reserved area.
Change-Id: Idbd9a7fe4b12af23de1519892936d8d88a000e2c
Signed-off-by: Ting Shen <phoenixshen@google.com>
Reviewed-on: https://review.coreboot.org/c/31123
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/soc/nvidia')
| -rw-r--r-- | src/soc/nvidia/tegra210/soc.c | 13 |
1 files changed, 12 insertions, 1 deletions
diff --git a/src/soc/nvidia/tegra210/soc.c b/src/soc/nvidia/tegra210/soc.c index 71532be989..619d27fb11 100644 --- a/src/soc/nvidia/tegra210/soc.c +++ b/src/soc/nvidia/tegra210/soc.c @@ -16,6 +16,7 @@ #include <arch/io.h> #include <arch/cache.h> +#include <bootmem.h> #include <bootmode.h> #include <bootstate.h> #include <console/console.h> @@ -33,13 +34,23 @@ #include "chip.h" +void bootmem_platform_add_ranges(void) +{ + uintptr_t begin; + size_t size; + carveout_range(CARVEOUT_TZ, &begin, &size); + if (size == 0) + return; + bootmem_add_range(begin * MiB, size * MiB, BM_MEM_BL31); +} + static void soc_read_resources(struct device *dev) { unsigned long index = 0; int i; uintptr_t begin, end; size_t size; - for (i = 0; i < CARVEOUT_NUM; i++) { + for (i = CARVEOUT_TZ + 1; i < CARVEOUT_NUM; i++) { carveout_range(i, &begin, &size); if (size == 0) continue; |