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authorElyes HAOUAS <ehaouas@noos.fr>2016-08-25 21:07:59 +0200
committerMartin Roth <martinroth@google.com>2016-08-31 20:09:42 +0200
commit4a83f1cf24b793db40606febb8e27cee90452590 (patch)
tree74943b190d2aa7c97da72d59f816157d4bc947e9 /src/soc/nvidia
parent3c80408fc8aa7b4099493acd7420f8d62ce65a48 (diff)
downloadcoreboot-4a83f1cf24b793db40606febb8e27cee90452590.tar.xz
src/soc: Add required space before opening parenthesis '('
Change-Id: Ifc47f103492a2cd6c818dfd64be971d34afbe0a4 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16324 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/nvidia')
-rw-r--r--src/soc/nvidia/tegra124/dp.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/nvidia/tegra124/dp.c b/src/soc/nvidia/tegra124/dp.c
index 3a3bce8b15..a308f68fe1 100644
--- a/src/soc/nvidia/tegra124/dp.c
+++ b/src/soc/nvidia/tegra124/dp.c
@@ -891,7 +891,7 @@ static int tegra_dp_link_config(struct tegra_dc_dp_data *dp,
}
/* Set power state if it is not in normal level */
- if(tegra_dc_dp_dpcd_read(dp, NV_DPCD_SET_POWER, &dpcd_data))
+ if (tegra_dc_dp_dpcd_read(dp, NV_DPCD_SET_POWER, &dpcd_data))
return DP_LT_FAILED;
if (dpcd_data == NV_DPCD_SET_POWER_VAL_D3_PWRDWN) {
@@ -910,7 +910,7 @@ static int tegra_dp_link_config(struct tegra_dc_dp_data *dp,
/* Enable ASSR if possible */
if (link_cfg->alt_scramber_reset_cap)
- if(tegra_dc_dp_set_assr(dp, 1))
+ if (tegra_dc_dp_set_assr(dp, 1))
return DP_LT_FAILED;
if (tegra_dp_set_link_bandwidth(dp, link_cfg->link_bw)) {