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author | Aaron Durbin <adurbin@chromium.org> | 2014-08-05 13:35:39 -0500 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2015-03-25 22:31:55 +0100 |
commit | 4d54eab14bf03d32dca24a49838d6d61fc2ac9ea (patch) | |
tree | cea7c36f0b8449c789d9c609a1c39be299bad5f4 /src/soc/nvidia | |
parent | 44e5e4ce73153ae17442daae11e89b40815a4c90 (diff) | |
download | coreboot-4d54eab14bf03d32dca24a49838d6d61fc2ac9ea.tar.xz |
tegra132: select HAVE_MONOTONIC_TIMER
The tegra132 SoC provides the monotonic timer API. Therefore,
ensure the reset of the coreboot infrastructure is aware.
BUG=None
BRANCH=None
TEST=Built and ran on Ryu. Noted that ramsgage is showing timings
for each bootstate.
Change-Id: Ifc2d5b7eb318ffac0ad79bfbc3d1b61a7ba4b10c
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: b691572c63a43a01a290f1c00f71097028d1415e
Original-Change-Id: I9b8fcf38cba9bdaaf0455701df1d6328bf1927c1
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/211132
Original-Reviewed-by: Tom Warren <twarren@nvidia.com>
Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: http://review.coreboot.org/8912
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc/nvidia')
-rw-r--r-- | src/soc/nvidia/tegra132/Kconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/nvidia/tegra132/Kconfig b/src/soc/nvidia/tegra132/Kconfig index bfd7089738..a4651c6408 100644 --- a/src/soc/nvidia/tegra132/Kconfig +++ b/src/soc/nvidia/tegra132/Kconfig @@ -8,6 +8,7 @@ config SOC_NVIDIA_TEGRA132 select ARM_LPAE select DYNAMIC_CBMEM select BOOTBLOCK_CONSOLE + select HAVE_MONOTONIC_TIMER select HAVE_HARD_RESET select HAVE_UART_SPECIAL select HAVE_UART_MEMORY_MAPPED |