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| author | Patrick Georgi <patrick@georgi-clan.de> | 2014-11-17 09:27:08 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2014-11-18 08:25:45 +0100 |
| commit | 68e4cbd9d6c4b7bf88b0f6fc207e75d1528766ad (patch) | |
| tree | 171ecc6dc394072c63a779d514a1a410b0a84b0a /src/soc/nvidia | |
| parent | 04f68c1cf174b075645500437058862b9a3ba169 (diff) | |
| download | coreboot-68e4cbd9d6c4b7bf88b0f6fc207e75d1528766ad.tar.xz | |
tegra124: actually parse is_lvds
Precedence rules make the compiler optimize
const | var ? val1 : val2; into val1. In our case this
means not writing 2 << NV_SOR_CSTM_ROTCLK_SHIFT to the
register and not caring about the content of is_lvds.
Change-Id: I0b02c74f9445f51bfab9eeae2e8eb9480d104708
Found-by: Coverity Scan
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: http://review.coreboot.org/7501
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/soc/nvidia')
| -rw-r--r-- | src/soc/nvidia/tegra124/sor.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/nvidia/tegra124/sor.c b/src/soc/nvidia/tegra124/sor.c index 3ff39ed0f2..3a2764801a 100644 --- a/src/soc/nvidia/tegra124/sor.c +++ b/src/soc/nvidia/tegra124/sor.c @@ -556,8 +556,8 @@ static void tegra_dc_sor_config_panel(struct tegra_dc_sor_data *sor, NV_SOR_CSTM_ROTCLK_DEFAULT_MASK | NV_SOR_CSTM_LVDS_EN_ENABLE, 2 << NV_SOR_CSTM_ROTCLK_SHIFT | - is_lvds ? NV_SOR_CSTM_LVDS_EN_ENABLE : - NV_SOR_CSTM_LVDS_EN_DISABLE); + (is_lvds ? NV_SOR_CSTM_LVDS_EN_ENABLE : + NV_SOR_CSTM_LVDS_EN_DISABLE)); } static void tegra_dc_sor_enable_dc(struct tegra_dc_sor_data *sor) |