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| author | Marshall Dawson <marshalldawson3rd@gmail.com> | 2019-06-20 11:03:06 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2019-08-09 20:23:50 +0000 |
| commit | 0bd0806d2f8158cf43f52fc3106fc759bd6c4a94 (patch) | |
| tree | 398a4c744b0018b6f8fc58c67cd43bd23842ec97 /src/soc/qualcomm/Kconfig | |
| parent | ad1fdac9879eb0aba5d7f05752ae010f3bdcff66 (diff) | |
| download | coreboot-0bd0806d2f8158cf43f52fc3106fc759bd6c4a94.tar.xz | |
soc/amd/picasso: Reduce 48M out configuration
Picasso has only a single 48M output. Simplify the setup function.
Note that while the feature is similar to older products, the register
definition and Enable bit has changed.
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Change-Id: Iebaf5219fdcd3145a4faf906f656a7fbdc7e0c36
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33768
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/qualcomm/Kconfig')
0 files changed, 0 insertions, 0 deletions