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authorKan Yan <kyan@google.com>2016-06-30 13:46:56 -0700
committerMartin Roth <martinroth@google.com>2016-08-11 22:30:34 +0200
commit7f3ecedd776dc41a4d5dbaab8ef8146b8ba38ae3 (patch)
tree6c4cf567361e6f3e0fedd7c6506add52a736fed3 /src/soc/qualcomm/ipq40xx
parent785ff1b7dbbaa276c4ce9fc1663736e1647886c1 (diff)
downloadcoreboot-7f3ecedd776dc41a4d5dbaab8ef8146b8ba38ae3.tar.xz
soc/qualcomm/ipq40xx: Reduce the delay in I2C.
3ms delay was found in testing to be sufficient for qup_i2c_write_fifo_flush(), but 1 additional ms was added to give additional headroom. Change the Delay from 10ms to 4ms. BUG=b:28942403 TEST=Boot up Gale board and the TPM functions normally. BRANCH=None Change-Id: I6821e2a101cc44e11d74eb6a6215aa9b848ae8c6 Signed-off-by: Martin Roth <martinroth@chromium.org> Original-Commit-Id: d93520fab15c5695ea18db21d0f3b24a108f204d Original-Change-Id: I202f5b8a1ef62bb039c56ba5a25b48b205cf4a67 Original-Signed-off-by: Kan Yan <kyan@google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/357961 Original-Reviewed-by: Suresh Rajashekara <sureshraj@chromium.org> Original-Reviewed-by: SARAVANAKUMAR SUDALAI <ssudalai@qti.qualcomm.com> Reviewed-on: https://review.coreboot.org/16126 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/soc/qualcomm/ipq40xx')
-rw-r--r--src/soc/qualcomm/ipq40xx/qup.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/qualcomm/ipq40xx/qup.c b/src/soc/qualcomm/ipq40xx/qup.c
index d2c1f282b6..9276e145bb 100644
--- a/src/soc/qualcomm/ipq40xx/qup.c
+++ b/src/soc/qualcomm/ipq40xx/qup.c
@@ -175,7 +175,7 @@ static inline qup_return_t qup_i2c_write_fifo_flush(blsp_qup_id_t id)
qup_write32(QUP_ADDR(id, QUP_OPERATIONAL), OUTPUT_SERVICE_FLAG);
- mdelay(10); /* TPM seems to need this */
+ mdelay(4); /* TPM seems to need this */
ret = qup_fifo_wait_while(id, OUTPUT_FIFO_NOT_EMPTY);
if (ret)