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author | Vadim Bendebury <vbendeb@chromium.org> | 2014-06-04 17:38:51 -0700 |
---|---|---|
committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2015-01-03 05:02:36 +0100 |
commit | 96c9686407a002d577be4fde9a609175f1f467c5 (patch) | |
tree | d006875aa9cc8acb94442071765430ced566d990 /src/soc/qualcomm/ipq806x/Kconfig | |
parent | 1485c3040b1c4ab4b204ebaae94e2023ff30db1b (diff) | |
download | coreboot-96c9686407a002d577be4fde9a609175f1f467c5.tar.xz |
storm: Put the page table at a correct address
The recently introduced page table location value is wrong, it
overlaps with other areas of the code. This patch fixes the location,
a more robust scheme is needed for memory layout management.
BUG=none
TEST=manual
. occasional random failures disappear after this patch is applied
Original-Change-Id: Idc9047d38712736c5e8197e933c373488b333649
Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/202641
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
(cherry picked from commit d26bb18e506680a1f481c3950007b2ea6a48e54d)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Change-Id: I7afcab42db259e53541fb991b36d680fc2186304
Reviewed-on: http://review.coreboot.org/8019
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/soc/qualcomm/ipq806x/Kconfig')
-rw-r--r-- | src/soc/qualcomm/ipq806x/Kconfig | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/qualcomm/ipq806x/Kconfig b/src/soc/qualcomm/ipq806x/Kconfig index 19d5236546..2298fc0a99 100644 --- a/src/soc/qualcomm/ipq806x/Kconfig +++ b/src/soc/qualcomm/ipq806x/Kconfig @@ -72,6 +72,6 @@ config CBFS_CACHE_SIZE config TTB_BUFFER hex "memory address for page tables" - default 0x405f0000 + default 0x405c0000 endif |