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authorVadim Bendebury <vbendeb@chromium.org>2014-04-07 18:59:53 -0700
committerMarc Jones <marc.jones@se-eng.com>2014-11-12 20:39:01 +0100
commit9cb70ae31f482f45ffeeae7008edca8978730926 (patch)
treee65b3e1da2bb69c55e533b500c336c02c9fd22d7 /src/soc/qualcomm/ipq806x/Kconfig
parentbf04edaba71e61d8d2c7ee900c68fee82e0722c5 (diff)
downloadcoreboot-9cb70ae31f482f45ffeeae7008edca8978730926.tar.xz
Include IPQ8064 SBLs code in the coreboot bootblock
We want the coreboot build produce an image which can be run on the target, even if the remaining parts of the bootprom (recovery path, read-write stages, gbb, etc.) are not available yet. This is achieved by including the Qualcomm SBLs blob in the bootblock. CQ-DEPEND=CL:193518 BRANCH=None BUG=chrome-os-partner:27784 TEST=manual . run the following commands inside chroot to confirm expected image layout (no actual code is executed on the target yet): $ emerge-storm coreboot $ \od -Ax -t x1 -v /build/storm/firmware/coreboot.rom 2>/dev/null | head -1 000000 d1 dc 4b 84 34 10 d7 73 15 00 00 00 ff ff ff ff $ \od -Ax -t x1 -v /build/storm/firmware/coreboot.rom | grep 220000 220000 05 00 00 00 03 00 00 00 00 00 00 00 00 00 01 2a Original-Change-Id: I10e8b81c7bd90e4550a027573ad3a26c38c3808a Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/193540 (cherry picked from commit 64e193974ee448f78e0a5775a440094901590afb) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: Idbdbeb9d229eff94a7a94af5dc4844a295458200 Reviewed-on: http://review.coreboot.org/7262 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc/qualcomm/ipq806x/Kconfig')
-rw-r--r--src/soc/qualcomm/ipq806x/Kconfig8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/soc/qualcomm/ipq806x/Kconfig b/src/soc/qualcomm/ipq806x/Kconfig
index 0f65990385..88dbd36431 100644
--- a/src/soc/qualcomm/ipq806x/Kconfig
+++ b/src/soc/qualcomm/ipq806x/Kconfig
@@ -13,11 +13,11 @@ config BOOTBLOCK_ROM_OFFSET
config CBFS_HEADER_ROM_OFFSET
hex "offset of master CBFS header in ROM"
- default 0x18000
+ default 0x221000
config CBFS_ROM_OFFSET
hex "offset of CBFS data in ROM"
- default 0x18080
+ default 0x221080
config MBN_ENCAPSULATION
depends on USE_BLOBS
@@ -34,7 +34,7 @@ config SBL_BLOB
vendor.
config BOOTBLOCK_BASE
- hex "64K bytes left for TZBSP"
- default 0x2a010000
+ hex "256K bytes left for TZBSP"
+ default 0x2a040000
endif