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authorJulius Werner <jwerner@chromium.org>2014-10-20 13:20:49 -0700
committerPatrick Georgi <pgeorgi@google.com>2015-04-08 09:34:44 +0200
commit73d1ed66d316489d8dfd7f1b61dd0c4fceb0e24b (patch)
treefff0d026b42199b768d19fd13b8cad4b2458d82f /src/soc/qualcomm/ipq806x/include/soc/gpio.h
parentf8c8703be0a828366a3921062c40ffa4dd827365 (diff)
downloadcoreboot-73d1ed66d316489d8dfd7f1b61dd0c4fceb0e24b.tar.xz
ipq806x: Change all SoC headers to <soc/headername.h> system
This patch aligns ipq806x to the new SoC header include scheme. Also alphabetized headers in affected files since we touch them anyway. BUG=None TEST=Tested with whole series. Compiled Storm. Change-Id: Icb81a77e6f458625f5379a980e8760388dd3a1f9 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 1bf23774c9ffa5d08c211f3658d39adcfa47b339 Original-Change-Id: I283cc7e6094be977d67ed4146f376cebcea6774a Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/224502 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9368 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/soc/qualcomm/ipq806x/include/soc/gpio.h')
-rw-r--r--src/soc/qualcomm/ipq806x/include/soc/gpio.h110
1 files changed, 110 insertions, 0 deletions
diff --git a/src/soc/qualcomm/ipq806x/include/soc/gpio.h b/src/soc/qualcomm/ipq806x/include/soc/gpio.h
new file mode 100644
index 0000000000..276022c0af
--- /dev/null
+++ b/src/soc/qualcomm/ipq806x/include/soc/gpio.h
@@ -0,0 +1,110 @@
+/*
+ * Copyright (c) 2012 The Linux Foundation. All rights reserved.*
+ Source : APQ8064 LK Boot
+
+ * Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above
+ * copyright notice, this list of conditions and the following
+ * disclaimer in the documentation and/or other materials provided
+ * with the distribution.
+ * * Neither the name of Code Aurora Forum, Inc. nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __SOC_QUALCOMM_IPQ806X_GPIO_H_
+#define __SOC_QUALCOMM_IPQ806X_GPIO_H_
+
+#include <gpiolib.h>
+
+#define GPIO_FUNC_ENABLE 1
+#define GPIO_FUNC_DISABLE 0
+#define FUNC_SEL_1 1
+#define FUNC_SEL_3 3
+#define FUNC_SEL_GPIO 0
+#define GPIO_DRV_STR_10MA 0x4
+#define GPIO_DRV_STR_11MA 0x7
+
+/* GPIO TLMM: Direction */
+#define GPIO_INPUT 0
+#define GPIO_OUTPUT 1
+
+/* GPIO TLMM: Pullup/Pulldown */
+#define GPIO_NO_PULL 0
+#define GPIO_PULL_DOWN 1
+#define GPIO_KEEPER 2
+#define GPIO_PULL_UP 3
+
+/* GPIO TLMM: Drive Strength */
+#define GPIO_2MA 0
+#define GPIO_4MA 1
+#define GPIO_6MA 2
+#define GPIO_8MA 3
+#define GPIO_10MA 4
+#define GPIO_12MA 5
+#define GPIO_14MA 6
+#define GPIO_16MA 7
+
+/* GPIO TLMM: Status */
+#define GPIO_DISABLE 0
+#define GPIO_ENABLE 1
+
+/* GPIO MAX Valid # */
+#define GPIO_MAX_NUM 68
+
+/* GPIO TLMM: Mask */
+#define GPIO_CFG_PULL_MASK 0x3
+#define GPIO_CFG_FUNC_MASK 0xF
+#define GPIO_CFG_DRV_MASK 0x7
+#define GPIO_CFG_OE_MASK 0x1
+
+/* GPIO TLMM: Shift */
+#define GPIO_CFG_PULL_SHIFT 0
+#define GPIO_CFG_FUNC_SHIFT 2
+#define GPIO_CFG_DRV_SHIFT 6
+#define GPIO_CFG_OE_SHIFT 9
+
+/* GPIO IO: Mask */
+#define GPIO_IO_IN_MASK 0x1
+#define GPIO_IO_OUT_MASK 0x1
+
+/* GPIO IO: Shift */
+#define GPIO_IO_IN_SHIFT 0
+#define GPIO_IO_OUT_SHIFT 1
+
+void gpio_tlmm_config_set(gpio_t gpio, unsigned int func,
+ unsigned int pull, unsigned int drvstr,
+ unsigned int enable);
+
+void gpio_tlmm_config_get(gpio_t gpio, unsigned int *func,
+ unsigned int *pull, unsigned int *drvstr,
+ unsigned int *enable);
+
+void gpio_io_config_set(gpio_t gpio, unsigned int out);
+
+/* Keep this to maintain backwards compatibility with the vendor API. */
+static inline void gpio_tlmm_config(unsigned int gpio, unsigned int func,
+ unsigned int dir, unsigned int pull,
+ unsigned int drvstr, unsigned int enable)
+{
+ gpio_tlmm_config_set(gpio, func, pull, drvstr, enable);
+}
+#endif // __SOC_QUALCOMM_IPQ806X_GPIO_H_