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authorAaron Durbin <adurbin@chromium.org>2015-09-05 10:27:12 -0500
committerAaron Durbin <adurbin@chromium.org>2015-09-09 19:35:20 +0000
commite5bad5cd3d828eba06f1db66f43948f966e7b0e0 (patch)
tree57223c791720e2aa2137f386b43580bb14e23cc5 /src/soc/qualcomm/ipq806x
parent14714e1303a420f9e0bf0bb5bba2efaae2c52efb (diff)
downloadcoreboot-e5bad5cd3d828eba06f1db66f43948f966e7b0e0.tar.xz
verstage: use common program.ld for linking
There's no reason to have a separate verstage.ld now that there is a unified stage linking strategy. Moreover verstage support is throughout the code base as it is so bring in those link script macros into the common memlayout.h as that removes one more specific thing a board/chipset needs to do in order to turn on verstage. BUG=chrome-os-partner:44827 BRANCH=None TEST=None Change-Id: I1195e06e06c1f81a758f68a026167689c19589dd Signed-off-by: Aaron Durbin <adubin@chromium.org> Reviewed-on: http://review.coreboot.org/11516 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/soc/qualcomm/ipq806x')
-rw-r--r--src/soc/qualcomm/ipq806x/include/soc/memlayout.ld1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/soc/qualcomm/ipq806x/include/soc/memlayout.ld b/src/soc/qualcomm/ipq806x/include/soc/memlayout.ld
index cf417bac31..ad0977ae75 100644
--- a/src/soc/qualcomm/ipq806x/include/soc/memlayout.ld
+++ b/src/soc/qualcomm/ipq806x/include/soc/memlayout.ld
@@ -19,7 +19,6 @@
*/
#include <memlayout.h>
-#include <vendorcode/google/chromeos/memlayout.h>
#include <arch/header.ld>