ipq806x: initialize UART even when console is not enabled

The ipq806x UART is based on the same universal serial port which can
be also configured as i2c or SPI. Configuring it is not a trivial
task, so in case the kernel wants to use earlyprintk() the port needs
to be configured by the firmware.

Invoking uart_init() when the console is not enabled causes include
file collisions, which would require changes to more than 100 files.
Leaving this to another day, rearranging the ipq806x driver to be able
to invoke UART initialization function even when serial console is not
configured.

Also add a check to avoid initialization if UART has been already
set up.

BRANCH=storm
BUG=chrome-os-partner:35364
TEST=verified that storm console is still fully operational when
     enabled, and that the kernel boots fine to the serial console
     login prompt even if the firmware console is disabled.

Change-Id: Ibbbab875449f2ac2f0d6c504c18faf0da8251ffa
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: c512d6c1d0c0868137d1213ea84cd4bca58872db
Original-Change-Id: I421acba3edf398d960b5058f15d1abb80ebc7660
Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/240516
Original-Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: http://review.coreboot.org/9794
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

4 files changed, 34 insertions, 10 deletions

diff --git a/src/soc/qualcomm/ipq806x/Makefile.inc b/src/soc/qualcomm/ipq806x/Makefile.inc
index 80bd0587b1..6aa10f8f7b 100644
--- a/src/soc/qualcomm/ipq806x/Makefile.inc
+++ b/src/soc/qualcomm/ipq806x/Makefile.inc
@@ -48,7 +48,7 @@ ramstage-y += lcc.c
 ramstage-y += soc.c
 ramstage-$(CONFIG_SPI_FLASH) += spi.c
 ramstage-y += timer.c
-ramstage-$(CONFIG_DRIVERS_UART) += uart.c
+ramstage-y += uart.c  # Want the UART always ready for the kernels' earlyprintk
 ramstage-y += usb.c
 ramstage-y += tz_wrapper.S
 
diff --git a/src/soc/qualcomm/ipq806x/include/soc/ipq_uart.h b/src/soc/qualcomm/ipq806x/include/soc/ipq_uart.h
index 90ca7047a2..f1b05b0c0c 100644
--- a/src/soc/qualcomm/ipq806x/include/soc/ipq_uart.h
+++ b/src/soc/qualcomm/ipq806x/include/soc/ipq_uart.h
@@ -267,5 +267,7 @@ enum MSM_BOOT_UART_DM_BITS_PER_CHAR {
 #define MSM_BOOT_UART_DM_E_MALLOC_FAIL       4
 #define MSM_BOOT_UART_DM_E_RX_NOT_READY      5
 
+void ipq806x_uart_init(void);
+
 #endif				/* __UART_DM_H__ */
 
diff --git a/src/soc/qualcomm/ipq806x/soc.c b/src/soc/qualcomm/ipq806x/soc.c
index 1d63cacf60..2170ae0d7b 100644
--- a/src/soc/qualcomm/ipq806x/soc.c
+++ b/src/soc/qualcomm/ipq806x/soc.c
@@ -22,6 +22,7 @@
 #include <console/console.h>
 #include <device/device.h>
 #include <symbols.h>
+#include <soc/ipq_uart.h>
 
 #define RESERVED_SIZE_KB	(0x01500000 / KiB)
 
@@ -35,6 +36,12 @@ static void soc_read_resources(device_t dev)
 
 static void soc_init(device_t dev)
 {
+	/*
+	 * Do this in case console is not enabled: kernel's earlyprintk()
+	 * should work no matter what the firmware console configuration is.
+	 */
+	ipq806x_uart_init();
+
 	printk(BIOS_INFO, "CPU: Qualcomm 8064\n");
 }
 
diff --git a/src/soc/qualcomm/ipq806x/uart.c b/src/soc/qualcomm/ipq806x/uart.c
index ffb58c9495..ebe1913734 100644
--- a/src/soc/qualcomm/ipq806x/uart.c
+++ b/src/soc/qualcomm/ipq806x/uart.c
@@ -82,14 +82,6 @@ static const uart_params_t uart_board_param = {
 		}
 };
 
-static unsigned int msm_boot_uart_dm_init(void  *uart_dm_base);
-
-/* Received data is valid or not */
-static int valid_data = 0;
-
-/* Received data */
-static unsigned int word = 0;
-
 /**
  * msm_boot_uart_dm_init_rx_transfer - Init Rx transfer
  * @uart_dm_base: UART controller base address
@@ -117,6 +109,15 @@ static unsigned int msm_boot_uart_dm_init_rx_transfer(void *uart_dm_base)
 	return MSM_BOOT_UART_DM_E_SUCCESS;
 }
 
+#if IS_ENABLED(CONFIG_DRIVERS_UART)
+static unsigned int msm_boot_uart_dm_init(void  *uart_dm_base);
+
+/* Received data is valid or not */
+static int valid_data = 0;
+
+/* Received data */
+static unsigned int word = 0;
+
 /**
  * msm_boot_uart_dm_read - reads a word from the RX FIFO.
  * @data: location where the read data is stored
@@ -211,6 +212,7 @@ void uart_tx_byte(int idx, unsigned char data)
 	/* And now write the character(s) */
 	writel(tx_data, MSM_BOOT_UART_DM_TF(base, 0));
 }
+#endif /* CONFIG_SERIAL_UART */
 
 /*
  * msm_boot_uart_dm_reset - resets UART controller
@@ -297,7 +299,7 @@ static unsigned int msm_boot_uart_dm_init(void  *uart_dm_base)
 }
 
 /**
- * uart_init - initializes UART
+ * ipq806x_uart_init - initializes UART
  *
  * Initializes clocks, GPIO and UART controller.
  */
@@ -308,6 +310,10 @@ void uart_init(int idx)
 	void *gsbi_base;
 
 	dm_base = uart_board_param.uart_dm_base;
+
+	if (readl(MSM_BOOT_UART_DM_CSR(dm_base)) == UART_DM_CLK_RX_TX_BIT_RATE)
+		return; /* UART must have been already initialized. */
+
 	gsbi_base = uart_board_param.uart_gsbi_base;
 	ipq_configure_gpio(uart_board_param.dbg_uart_gpio,
 			   NO_OF_DBG_UART_GPIOS);
@@ -328,6 +334,12 @@ void uart_init(int idx)
 	msm_boot_uart_dm_init(dm_base);
 }
 
+/* for the benefit of non-console uart init */
+void ipq806x_uart_init(void)
+{
+	uart_init(0);
+}
+
 #if 0 /* Not used yet */
 uint32_t uartmem_getbaseaddr(void)
 {
@@ -369,6 +381,7 @@ int uart_can_rx_byte(void)
 }
 #endif
 
+#if IS_ENABLED(CONFIG_DRIVERS_UART)
 /**
  * ipq806x_serial_getc - reads a character
  *
@@ -389,6 +402,8 @@ uint8_t uart_rx_byte(int idx)
 
 	return byte;
 }
+#endif
+
 #ifndef __PRE_RAM__
 /* TODO: Implement fuction */
 void uart_fill_lb(void *data)