diff options
| author | Vadim Bendebury <vbendeb@chromium.org> | 2014-10-10 13:35:01 -0700 |
|---|---|---|
| committer | Aaron Durbin <adurbin@google.com> | 2015-04-07 23:02:08 +0200 |
| commit | 424d79b02900011eaa851306f71d2e76b13b4740 (patch) | |
| tree | ec0270c1130d686ca2616d15ca2e0ea845445937 /src/soc/qualcomm/ipq806x | |
| parent | 4282ffe684eb6cacef94b3ac87d5b081303bca2e (diff) | |
| download | coreboot-424d79b02900011eaa851306f71d2e76b13b4740.tar.xz | |
storm: fix CBFS definitions
It's been a while since SBL blob size was reduced. As CBFS area by
definition includes the bootblock, storm configuration needs to be
updated to address the changes in layout.
Incidentally, it looks like CBFS_SIZE configuration setting is not
used on ARM platforms, this will have to be addressed separately.
BRANCH=storm
BUG=chromium:422501
TEST=storm firmware does not report the failure to find payload anymore
Original-Change-Id: I37abf76a9d8884b3431633f57f64896c3a5fb135
Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/222898
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
(cherry picked from commit b104d5c1c328b8bd9c6f926ed4fe3e4948860fbc)
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Change-Id: I2800bf4ac6383c5ceb47330f07efaaf64e5d80d9
Reviewed-on: http://review.coreboot.org/9372
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/soc/qualcomm/ipq806x')
| -rw-r--r-- | src/soc/qualcomm/ipq806x/Kconfig | 4 | ||||
| -rw-r--r-- | src/soc/qualcomm/ipq806x/memlayout.ld | 2 |
2 files changed, 3 insertions, 3 deletions
diff --git a/src/soc/qualcomm/ipq806x/Kconfig b/src/soc/qualcomm/ipq806x/Kconfig index 9e6a053736..8cc7233908 100644 --- a/src/soc/qualcomm/ipq806x/Kconfig +++ b/src/soc/qualcomm/ipq806x/Kconfig @@ -27,11 +27,11 @@ config BOOTBLOCK_ROM_OFFSET config CBFS_HEADER_ROM_OFFSET hex "offset of master CBFS header in ROM" - default 0x228000 + default 0x1b4000 config CBFS_ROM_OFFSET hex "offset of CBFS data in ROM" - default 0x228080 + default 0x1b4080 config MBN_ENCAPSULATION depends on USE_BLOBS diff --git a/src/soc/qualcomm/ipq806x/memlayout.ld b/src/soc/qualcomm/ipq806x/memlayout.ld index 30596031ec..de1b12935c 100644 --- a/src/soc/qualcomm/ipq806x/memlayout.ld +++ b/src/soc/qualcomm/ipq806x/memlayout.ld @@ -29,7 +29,7 @@ SECTIONS TTB(0x2A05C000, 48K) DRAM_START(0x40000000) - CBFS_CACHE(0x405CC000, 192K) + CBFS_CACHE(0x405C0000, 240K) STACK(0x405FC000, 16K) /* TODO: "256K bytes left for TZBSP"... what does that mean? */ BOOTBLOCK(0x40600000, 32K) |