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authorNitheesh Sekar <nsekar@codeaurora.org>2018-09-16 16:16:42 +0530
committerPatrick Georgi <pgeorgi@google.com>2019-03-18 18:18:52 +0000
commit717050d1d27a5c88bf1921da94476d0bfc592d97 (patch)
tree5e6065b68a799251234e0904214d21f38e322e45 /src/soc/qualcomm/qcs405/include
parentef75cca0e1d7c307547a972b07e14283c7d6d013 (diff)
downloadcoreboot-717050d1d27a5c88bf1921da94476d0bfc592d97.tar.xz
qcs405: Add DRAM resources
TEST=build Change-Id: Iea79a942c297400c88aa205da713bcfcb8c51185 Signed-off-by: Sricharan R <sricharan@codeaurora.org> Signed-off-by: Nitheesh Sekar <nsekar@codeaurora.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/29954 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/soc/qualcomm/qcs405/include')
-rw-r--r--src/soc/qualcomm/qcs405/include/soc/memlayout.ld8
-rw-r--r--src/soc/qualcomm/qcs405/include/soc/symbols.h1
2 files changed, 6 insertions, 3 deletions
diff --git a/src/soc/qualcomm/qcs405/include/soc/memlayout.ld b/src/soc/qualcomm/qcs405/include/soc/memlayout.ld
index d6e4dfb361..8ed258bf52 100644
--- a/src/soc/qualcomm/qcs405/include/soc/memlayout.ld
+++ b/src/soc/qualcomm/qcs405/include/soc/memlayout.ld
@@ -42,7 +42,9 @@ SECTIONS
REGION(bsram_unused, 0x8C68C00, 0xA2400, 0x100)
BSRAM_END(0x8D80000)
- DRAM_START(0x90000000)
- POSTRAM_CBFS_CACHE(0x90000000, 384K)
- RAMSTAGE(0x90800000, 128K)
+ DRAM_START(0x80000000)
+ /* DDR Carveout for BL31 usage */
+ REGION(dram_reserved, 0x85000000, 0x5100000, 4096)
+ POSTRAM_CBFS_CACHE(0x9F800000, 384K)
+ RAMSTAGE(0x9F860000, 128K)
}
diff --git a/src/soc/qualcomm/qcs405/include/soc/symbols.h b/src/soc/qualcomm/qcs405/include/soc/symbols.h
index ef2285c910..45e6988683 100644
--- a/src/soc/qualcomm/qcs405/include/soc/symbols.h
+++ b/src/soc/qualcomm/qcs405/include/soc/symbols.h
@@ -21,5 +21,6 @@
DECLARE_REGION(ssram);
DECLARE_REGION(bsram);
+DECLARE_REGION(dram_reserved);
#endif // _SOC_QUALCOMM_QCS405_SYMBOLS_H_