diff options
author | Nitheesh Sekar <nsekar@codeaurora.org> | 2018-09-14 18:50:38 +0530 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2019-03-18 18:18:00 +0000 |
commit | 6bee0cee20fad2a3c68a9c54694807d9f2f48b0c (patch) | |
tree | 449146c9413335861a52a752b900d5e5693ddb1e /src/soc/qualcomm/qcs405 | |
parent | 918fc00fb40fb847acc4f4c8c9e9657b5e283e68 (diff) | |
download | coreboot-6bee0cee20fad2a3c68a9c54694807d9f2f48b0c.tar.xz |
soc/qualcomm/qcs405: Add MMU support
Initialize 1st 4GB as Device Memory, except:
* 1st page: NULL address
* System_IMEM: Cached SRAM
* Boot_IMEM: Cached SRAM
Change-Id: I8c6353be2c0379ec94f91223805762a2286de06d
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Signed-off-by: Nitheesh Sekar <nsekar@codeaurora.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/29950
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/soc/qualcomm/qcs405')
-rw-r--r-- | src/soc/qualcomm/qcs405/Makefile.inc | 1 | ||||
-rw-r--r-- | src/soc/qualcomm/qcs405/bootblock.c | 3 | ||||
-rw-r--r-- | src/soc/qualcomm/qcs405/include/soc/mmu.h | 21 | ||||
-rw-r--r-- | src/soc/qualcomm/qcs405/include/soc/symbols.h | 25 | ||||
-rw-r--r-- | src/soc/qualcomm/qcs405/mmu.c | 32 |
5 files changed, 81 insertions, 1 deletions
diff --git a/src/soc/qualcomm/qcs405/Makefile.inc b/src/soc/qualcomm/qcs405/Makefile.inc index 15f5a0c4d3..2d1f842f95 100644 --- a/src/soc/qualcomm/qcs405/Makefile.inc +++ b/src/soc/qualcomm/qcs405/Makefile.inc @@ -5,6 +5,7 @@ ifeq ($(CONFIG_SOC_QUALCOMM_QCS405),y) bootblock-y += bootblock.c bootblock-y += timer.c bootblock-y += spi.c +bootblock-y += mmu.c ################################################################################ verstage-y += timer.c diff --git a/src/soc/qualcomm/qcs405/bootblock.c b/src/soc/qualcomm/qcs405/bootblock.c index 3ed37ae2d1..5e63f132fc 100644 --- a/src/soc/qualcomm/qcs405/bootblock.c +++ b/src/soc/qualcomm/qcs405/bootblock.c @@ -14,8 +14,9 @@ */ #include <bootblock_common.h> +#include <soc/mmu.h> void bootblock_soc_init(void) { - + qcs405_mmu_init(); } diff --git a/src/soc/qualcomm/qcs405/include/soc/mmu.h b/src/soc/qualcomm/qcs405/include/soc/mmu.h new file mode 100644 index 0000000000..bc42e7271a --- /dev/null +++ b/src/soc/qualcomm/qcs405/include/soc/mmu.h @@ -0,0 +1,21 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2018, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _SOC_QUALCOMM_QCS405_MMU_H__ +#define _SOC_QUALCOMM_QCS405_MMU_H__ + +void qcs405_mmu_init(void); + +#endif // _SOC_QUALCOMM_QCS405_MMU_H_ diff --git a/src/soc/qualcomm/qcs405/include/soc/symbols.h b/src/soc/qualcomm/qcs405/include/soc/symbols.h new file mode 100644 index 0000000000..ef2285c910 --- /dev/null +++ b/src/soc/qualcomm/qcs405/include/soc/symbols.h @@ -0,0 +1,25 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2018, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _SOC_QUALCOMM_QCS405_SYMBOLS_H_ +#define _SOC_QUALCOMM_QCS405_SYMBOLS_H_ + +#include <symbols.h> +#include <types.h> + +DECLARE_REGION(ssram); +DECLARE_REGION(bsram); + +#endif // _SOC_QUALCOMM_QCS405_SYMBOLS_H_ diff --git a/src/soc/qualcomm/qcs405/mmu.c b/src/soc/qualcomm/qcs405/mmu.c new file mode 100644 index 0000000000..a2d626fd35 --- /dev/null +++ b/src/soc/qualcomm/qcs405/mmu.c @@ -0,0 +1,32 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2018, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <symbols.h> +#include <arch/mmu.h> +#include <arch/cache.h> +#include <soc/mmu.h> +#include <soc/symbols.h> + +void qcs405_mmu_init(void) +{ + mmu_init(); + + mmu_config_range((void *)(4 * KiB), ((4UL * GiB) - (4 * KiB)), + MA_DEV | MA_S | MA_RW); + mmu_config_range((void *)_ssram, REGION_SIZE(ssram), MA_MEM | MA_S | MA_RW); + mmu_config_range((void *)_bsram, REGION_SIZE(bsram), MA_MEM | MA_S | MA_RW); + + mmu_enable(); +} |