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| author | Akash Asthana <akashast@codeaurora.org> | 2019-07-29 18:11:15 +0530 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-12-05 17:56:44 +0000 |
| commit | 634c783d1fbee4a9dee7a04c8d2e21d8b6d18e3c (patch) | |
| tree | 931979b66bc2414335c89235ca67d20119045b44 /src/soc/qualcomm/sc7180/Makefile.inc | |
| parent | 7e51f15129b67407b2803f1b229b7d873a598d6b (diff) | |
| download | coreboot-634c783d1fbee4a9dee7a04c8d2e21d8b6d18e3c.tar.xz | |
sc7180: Add SPI-NOR support
This implements the SPI-NOR driver for the Qualcomm QSPI core.
Developer/Reviewer, be aware of this patch from Napali:
https://review.coreboot.org/c/coreboot/+/27483/58
Change-Id: I2eb8cf90aa4559541ba293b3fd2870896bed20b7
Signed-off-by: Akash Asthana <akashast@codeaurora.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35501
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/qualcomm/sc7180/Makefile.inc')
| -rw-r--r-- | src/soc/qualcomm/sc7180/Makefile.inc | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/soc/qualcomm/sc7180/Makefile.inc b/src/soc/qualcomm/sc7180/Makefile.inc index 6b492d5784..e1d0492085 100644 --- a/src/soc/qualcomm/sc7180/Makefile.inc +++ b/src/soc/qualcomm/sc7180/Makefile.inc @@ -9,6 +9,7 @@ bootblock-y += spi.c bootblock-y += gpio.c bootblock-$(CONFIG_DRIVERS_UART) += uart_bitbang.c bootblock-y += clock.c +bootblock-$(CONFIG_SC7180_QSPI) += qspi.c ################################################################################ verstage-y += timer.c @@ -16,6 +17,7 @@ verstage-y += spi.c verstage-y += gpio.c verstage-$(CONFIG_DRIVERS_UART) += uart_bitbang.c verstage-y += clock.c +verstage-$(CONFIG_SC7180_QSPI) += qspi.c ################################################################################ romstage-y += cbmem.c @@ -28,6 +30,7 @@ romstage-y += spi.c romstage-y += gpio.c romstage-$(CONFIG_DRIVERS_UART) += uart_bitbang.c romstage-y += clock.c +romstage-$(CONFIG_SC7180_QSPI) += qspi.c ################################################################################ ramstage-y += soc.c @@ -36,6 +39,7 @@ ramstage-y += spi.c ramstage-y += gpio.c ramstage-$(CONFIG_DRIVERS_UART) += uart_bitbang.c ramstage-y += clock.c +ramstage-$(CONFIG_SC7180_QSPI) += qspi.c ################################################################################ |