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author | T Michael Turney <mturney@codeaurora.org> | 2019-10-09 07:04:54 -0700 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2019-10-21 09:06:55 +0000 |
commit | 7783c606a4694c39d2da26d10cf6b3ad036dfa81 (patch) | |
tree | 0f5469fbccdfdae48721177e9f39d961768df331 /src/soc/qualcomm/sc7180/spi.c | |
parent | 511a8f5538e7e095258f187b7aae9c32eeb4962a (diff) | |
download | coreboot-7783c606a4694c39d2da26d10cf6b3ad036dfa81.tar.xz |
sc7180: Provide initial SoC support
Change-Id: Iddcef560c1987486436b73ca1d5fc83cee2f713c
Signed-off-by: T Michael Turney <mturney@codeaurora.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35494
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/soc/qualcomm/sc7180/spi.c')
-rw-r--r-- | src/soc/qualcomm/sc7180/spi.c | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/src/soc/qualcomm/sc7180/spi.c b/src/soc/qualcomm/sc7180/spi.c new file mode 100644 index 0000000000..5abb81ac0a --- /dev/null +++ b/src/soc/qualcomm/sc7180/spi.c @@ -0,0 +1,29 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2018, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <spi-generic.h> +#include <spi_flash.h> + +static const struct spi_ctrlr spi_ctrlr; + +const struct spi_ctrlr_buses spi_ctrlr_bus_map[] = { + { + .ctrlr = &spi_ctrlr, + .bus_start = CONFIG_BOOT_DEVICE_SPI_FLASH_BUS, + .bus_end = CONFIG_BOOT_DEVICE_SPI_FLASH_BUS, + }, +}; + +const size_t spi_ctrlr_bus_map_count = ARRAY_SIZE(spi_ctrlr_bus_map); |