diff options
author | Shelley Chen <shchen@google.com> | 2020-10-21 22:46:14 -0700 |
---|---|---|
committer | Shelley Chen <shchen@google.com> | 2020-10-23 06:05:22 +0000 |
commit | 0263e0ff65d50a616e1ae04ab0837c0d90118d19 (patch) | |
tree | a1ce28d422fecc6198545ae056639f36eae58d6c /src/soc/qualcomm/sc7180 | |
parent | 3827f56fe1f97c4dc19af94782ed9cce89cec723 (diff) | |
download | coreboot-0263e0ff65d50a616e1ae04ab0837c0d90118d19.tar.xz |
sc7180: enable RECOVERY_MRC_CACHE
Enable caching of memory training data for recovery as well as normal
mode because memory training is taking too long in recovery as well.
This required creating a space in the fmap for RECOVERY_MRC_CACHE.
BUG=b:150502246
BRANCH=None
TEST=Run power_state:rec twice on lazor. Ensure that on first boot,
memory training occurs and on second boot, memory training is
skipped.
Change-Id: Id9059a8edd7527b0fe6cdc0447920d5ecbdf296e
Signed-off-by: Shelley Chen <shchen@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46651
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/qualcomm/sc7180')
-rw-r--r-- | src/soc/qualcomm/sc7180/Kconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/qualcomm/sc7180/Kconfig b/src/soc/qualcomm/sc7180/Kconfig index c37aff9db3..4cd1c41cac 100644 --- a/src/soc/qualcomm/sc7180/Kconfig +++ b/src/soc/qualcomm/sc7180/Kconfig @@ -19,6 +19,7 @@ config SOC_QUALCOMM_SC7180 select MAINBOARD_FORCE_NATIVE_VGA_INIT select HAVE_LINEAR_FRAMEBUFFER select CACHE_MRC_SETTINGS + select HAS_RECOVERY_MRC_CACHE select COMPRESS_BOOTBLOCK if SOC_QUALCOMM_SC7180 |