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authorRavi Kumar Bokka <rbokka@codeaurora.org>2021-02-09 11:33:46 +0530
committerShelley Chen <shchen@google.com>2021-05-19 20:23:55 +0000
commit1a47c6a2f70b20a53d2a3e193a1993269bd9588c (patch)
treed270949ed3b80f0b6affcc59d09bcd44866141e9 /src/soc/qualcomm/sc7280
parent01158d3bd7a6e13d9780ba97bb039d5af648c0b9 (diff)
downloadcoreboot-1a47c6a2f70b20a53d2a3e193a1993269bd9588c.tar.xz
sc7280: Reserve wlan & wpss dram memory regions
Change-Id: Ic98b5d08a0a7b3f772582bf85d94f901a7c53010 Signed-off-by: Ravi Kumar Bokka <rbokka@codeaurora.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50587 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Shelley Chen <shchen@google.com>
Diffstat (limited to 'src/soc/qualcomm/sc7280')
-rw-r--r--src/soc/qualcomm/sc7280/memlayout.ld2
-rw-r--r--src/soc/qualcomm/sc7280/soc.c4
2 files changed, 6 insertions, 0 deletions
diff --git a/src/soc/qualcomm/sc7280/memlayout.ld b/src/soc/qualcomm/sc7280/memlayout.ld
index ed7fce4898..8c264fb1ad 100644
--- a/src/soc/qualcomm/sc7280/memlayout.ld
+++ b/src/soc/qualcomm/sc7280/memlayout.ld
@@ -52,6 +52,8 @@ SECTIONS
REGION(dram_aop, 0x80800000, 0x040000, 0x1000)
REGION(dram_soc, 0x80900000, 0x200000, 0x1000)
BL31(0x80B00000, 1M)
+ REGION(dram_wlan, 0x80C00000, 0xC00000, 0x1000)
+ REGION(dram_wpss, 0x9AE00000, 0x1900000, 0x1000)
POSTRAM_CBFS_CACHE(0x9F800000, 16M)
RAMSTAGE(0xA0800000, 16M)
}
diff --git a/src/soc/qualcomm/sc7280/soc.c b/src/soc/qualcomm/sc7280/soc.c
index 33d4a69ec7..19cfbd96f0 100644
--- a/src/soc/qualcomm/sc7280/soc.c
+++ b/src/soc/qualcomm/sc7280/soc.c
@@ -12,6 +12,10 @@ static void soc_read_resources(struct device *dev)
ddr_region->size / KiB);
reserved_ram_resource(dev, 1, (uintptr_t)_dram_soc / KiB,
REGION_SIZE(dram_soc) / KiB);
+ reserved_ram_resource(dev, 4, (uintptr_t)_dram_wlan / KiB,
+ REGION_SIZE(dram_wlan) / KiB);
+ reserved_ram_resource(dev, 5, (uintptr_t)_dram_wpss / KiB,
+ REGION_SIZE(dram_wpss) / KiB);
}
static void soc_init(struct device *dev)