diff options
author | David Dai <daidavid1@codeaurora.org> | 2018-05-09 14:37:02 -0700 |
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committer | Julius Werner <jwerner@chromium.org> | 2018-08-01 23:19:38 +0000 |
commit | 09fbaaaff7778732709c2d87b88e617fb9af48f0 (patch) | |
tree | 234654faa1164bb6af6ddefa126f94a0907f6d08 /src/soc/qualcomm/sdm845/gpio.c | |
parent | 3044af7adc652f41670f8de0c3c54bc09f632079 (diff) | |
download | coreboot-09fbaaaff7778732709c2d87b88e617fb9af48f0.tar.xz |
sdm845: Add GPIO API
Introduces new and required GPIO APIs, using common pinmux
definitions for GPIO configuration.
TEST=build & run
Change-Id: I8cef9dae2072da32cb0678efefeb8f0070cdde9c
Signed-off-by: David Dai <daidavid1@codeaurora.org>
Reviewed-on: https://review.coreboot.org/26233
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/soc/qualcomm/sdm845/gpio.c')
-rw-r--r-- | src/soc/qualcomm/sdm845/gpio.c | 76 |
1 files changed, 76 insertions, 0 deletions
diff --git a/src/soc/qualcomm/sdm845/gpio.c b/src/soc/qualcomm/sdm845/gpio.c new file mode 100644 index 0000000000..edbb3b98fa --- /dev/null +++ b/src/soc/qualcomm/sdm845/gpio.c @@ -0,0 +1,76 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2018 Qualcomm Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <arch/io.h> +#include <types.h> +#include <console/console.h> +#include <delay.h> +#include <timer.h> +#include <timestamp.h> + +#include <gpio.h> + +void gpio_configure(gpio_t gpio, uint32_t func, uint32_t pull, + uint32_t drive_str, uint32_t enable) +{ + uint32_t reg_val; + struct tlmm_gpio *regs = (void *)(uintptr_t)gpio.addr; + + reg_val = ((enable & GPIO_CFG_OE_BMSK) << GPIO_CFG_OE_SHFT) | + ((drive_str & GPIO_CFG_DRV_BMSK) << GPIO_CFG_DRV_SHFT) | + ((func & GPIO_CFG_FUNC_BMSK) << GPIO_CFG_FUNC_SHFT) | + ((pull & GPIO_CFG_PULL_BMSK) << GPIO_CFG_PULL_SHFT); + + write32(®s->cfg, reg_val); +} + +void gpio_set(gpio_t gpio, int value) +{ + struct tlmm_gpio *regs = (void *)(uintptr_t)gpio.addr; + write32(®s->in_out, (!!value) << GPIO_IO_OUT_SHFT); +} + +int gpio_get(gpio_t gpio) +{ + struct tlmm_gpio *regs = (void *)(uintptr_t)gpio.addr; + + return ((read32(®s->in_out) >> GPIO_IO_IN_SHFT) & + GPIO_IO_IN_BMSK); +} + +void gpio_input_pulldown(gpio_t gpio) +{ + gpio_configure(gpio, GPIO_FUNC_DISABLE, + GPIO_PULL_DOWN, GPIO_2MA, GPIO_DISABLE); +} + +void gpio_input_pullup(gpio_t gpio) +{ + gpio_configure(gpio, GPIO_FUNC_DISABLE, + GPIO_PULL_UP, GPIO_2MA, GPIO_DISABLE); +} + +void gpio_input(gpio_t gpio) +{ + gpio_configure(gpio, GPIO_FUNC_DISABLE, + GPIO_NO_PULL, GPIO_2MA, GPIO_DISABLE); +} + +void gpio_output(gpio_t gpio, int value) +{ + gpio_set(gpio, value); + gpio_configure(gpio, GPIO_FUNC_DISABLE, + GPIO_NO_PULL, GPIO_2MA, GPIO_ENABLE); +} |