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authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-08-17 04:33:00 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-08-20 01:12:28 +0000
commita4e8fb2afd6ff92e84bd03c55668708e0c5d17df (patch)
treeb2cf6a0211d6e18b675e63956a85b0c6572c462d /src/soc/qualcomm
parent5c82c444fba6fd3cf506c777546a5481755808ff (diff)
downloadcoreboot-a4e8fb2afd6ff92e84bd03c55668708e0c5d17df.tar.xz
arch/non-x86: Remove use of __PRE_RAM__
Change-Id: Id8918f40572497b068509b5d5a490de0435ad50b Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34921 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/soc/qualcomm')
-rw-r--r--src/soc/qualcomm/ipq40xx/blobs_init.c4
-rw-r--r--src/soc/qualcomm/ipq40xx/uart.c2
-rw-r--r--src/soc/qualcomm/ipq806x/blobs_init.c5
-rw-r--r--src/soc/qualcomm/ipq806x/uart.c2
-rw-r--r--src/soc/qualcomm/qcs405/uart.c2
5 files changed, 0 insertions, 15 deletions
diff --git a/src/soc/qualcomm/ipq40xx/blobs_init.c b/src/soc/qualcomm/ipq40xx/blobs_init.c
index 5cda9fc7fb..9d608fa93d 100644
--- a/src/soc/qualcomm/ipq40xx/blobs_init.c
+++ b/src/soc/qualcomm/ipq40xx/blobs_init.c
@@ -58,8 +58,6 @@ static void *load_ipq_blob(const char *file_name)
return blob_mbn;
}
-#ifdef __PRE_RAM__
-
#define DDR_VERSION() ((const char *)"private build")
#define MAX_DDR_VERSION_SIZE 48
@@ -120,7 +118,6 @@ int initialize_dram(void)
return 0;
}
-#else /* __PRE_RAM__ */
void start_tzbsp(void)
{
void *tzbsp = load_ipq_blob(CONFIG_TZ_MBN);
@@ -133,4 +130,3 @@ void start_tzbsp(void)
tz_init_wrapper(0, 0, tzbsp);
}
-#endif /* !__PRE_RAM__ */
diff --git a/src/soc/qualcomm/ipq40xx/uart.c b/src/soc/qualcomm/ipq40xx/uart.c
index eb3731b7f7..95e2eab16d 100644
--- a/src/soc/qualcomm/ipq40xx/uart.c
+++ b/src/soc/qualcomm/ipq40xx/uart.c
@@ -283,7 +283,6 @@ uint8_t uart_rx_byte(int idx)
return byte;
}
-#ifndef __PRE_RAM__
/* TODO: Implement function */
void uart_fill_lb(void *data)
{
@@ -297,4 +296,3 @@ void uart_fill_lb(void *data)
lb_add_serial(&serial, data);
lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);
}
-#endif
diff --git a/src/soc/qualcomm/ipq806x/blobs_init.c b/src/soc/qualcomm/ipq806x/blobs_init.c
index aa78f566e9..2da868b892 100644
--- a/src/soc/qualcomm/ipq806x/blobs_init.c
+++ b/src/soc/qualcomm/ipq806x/blobs_init.c
@@ -57,8 +57,6 @@ static void *load_ipq_blob(const char *file_name)
return blob_mbn + 1;
}
-#ifdef __PRE_RAM__
-
#define DDR_VERSION() ((const char *)0x2a03f600)
#define MAX_DDR_VERSION_SIZE 48
@@ -89,8 +87,6 @@ int initialize_dram(void)
return 0;
}
-#else /* __PRE_RAM__ */
-
void start_tzbsp(void)
{
void *tzbsp = load_ipq_blob("tz.mbn");
@@ -152,4 +148,3 @@ void start_rpm(void)
(rpm_version >> 16) & 0xff,
rpm_version & 0xffff);
}
-#endif /* !__PRE_RAM__ */
diff --git a/src/soc/qualcomm/ipq806x/uart.c b/src/soc/qualcomm/ipq806x/uart.c
index 66c31034fa..f3e7de5910 100644
--- a/src/soc/qualcomm/ipq806x/uart.c
+++ b/src/soc/qualcomm/ipq806x/uart.c
@@ -398,9 +398,7 @@ uint8_t uart_rx_byte(int idx)
return byte;
}
-#ifndef __PRE_RAM__
/* TODO: Implement fuction */
void uart_fill_lb(void *data)
{
}
-#endif
diff --git a/src/soc/qualcomm/qcs405/uart.c b/src/soc/qualcomm/qcs405/uart.c
index 4a4331220a..6f95ba4ac6 100644
--- a/src/soc/qualcomm/qcs405/uart.c
+++ b/src/soc/qualcomm/qcs405/uart.c
@@ -287,7 +287,6 @@ uint8_t uart_rx_byte(int idx)
}
#endif
-#ifndef __PRE_RAM__
void uart_fill_lb(void *data)
{
struct lb_serial serial;
@@ -300,4 +299,3 @@ void uart_fill_lb(void *data)
lb_add_serial(&serial, data);
lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);
}
-#endif