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authorFurquan Shaikh <furquan@google.com>2016-07-25 16:57:46 -0700
committerFurquan Shaikh <furquan@google.com>2016-07-28 00:38:25 +0200
commita7f11b8ecf94d8ddb09f5dbfeff14dfee66e372d (patch)
tree6450c1d62456191d103c905ac38653b5388ed228 /src/soc/qualcomm
parent01ac811b08b6e4dbae4aa979cc23910a261e6310 (diff)
downloadcoreboot-a7f11b8ecf94d8ddb09f5dbfeff14dfee66e372d.tar.xz
qualcomm/storm: Add required files to enable elog in ramstage
BUG=chrome-os-partner:55639 Change-Id: Ie859ec3ff682e91a4d7d38d3c3cd6badf7385431 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/15894 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/soc/qualcomm')
-rw-r--r--src/soc/qualcomm/ipq806x/Makefile.inc4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/soc/qualcomm/ipq806x/Makefile.inc b/src/soc/qualcomm/ipq806x/Makefile.inc
index ffb8752968..42d28e4e77 100644
--- a/src/soc/qualcomm/ipq806x/Makefile.inc
+++ b/src/soc/qualcomm/ipq806x/Makefile.inc
@@ -49,6 +49,10 @@ ramstage-y += timer.c
ramstage-y += uart.c # Want the UART always ready for the kernels' earlyprintk
ramstage-y += usb.c
ramstage-y += tz_wrapper.S
+ramstage-y += gsbi.c
+ramstage-y += i2c.c
+ramstage-y += qup.c
+ramstage-y += spi.c
ifeq ($(CONFIG_USE_BLOBS),y)