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| author | Patrick Georgi <pgeorgi@chromium.org> | 2015-06-29 22:49:26 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-06-30 08:18:12 +0200 |
| commit | 954781f4f823558eb160e62196289ed30c13c635 (patch) | |
| tree | be310a43149e742c6b1bda9553ec03c3338e2b8a /src/soc/qualcomm | |
| parent | f0a97bf75ecc55292be3fbfd8601ce0d0510820f (diff) | |
| download | coreboot-954781f4f823558eb160e62196289ed30c13c635.tar.xz | |
qualcomm/ipq806x: centralize vboot configuration
vboot configuration (separate stage or not, which stage loads romstage)
depends on SoC properties (eg. amount of SRAM), not on board specifics, so
move this part of the configuration to the SoC.
Change-Id: I70b4cd1794ddf2aba7cdae94859ea1d76ae019f4
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/10702
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc/qualcomm')
| -rw-r--r-- | src/soc/qualcomm/ipq806x/Kconfig | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/qualcomm/ipq806x/Kconfig b/src/soc/qualcomm/ipq806x/Kconfig index 7f8937cf7c..ecc52e20f2 100644 --- a/src/soc/qualcomm/ipq806x/Kconfig +++ b/src/soc/qualcomm/ipq806x/Kconfig @@ -10,6 +10,8 @@ config SOC_QC_IPQ806X select HAVE_UART_SPECIAL select SPI_ATOMIC_SEQUENCING select GENERIC_GPIO_LIB + select SEPARATE_VERSTAGE + select RETURN_FROM_VERSTAGE if SOC_QC_IPQ806X |