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authorFurquan Shaikh <furquan@chromium.org>2016-11-20 21:04:00 -0800
committerFurquan Shaikh <furquan@google.com>2016-11-22 17:32:09 +0100
commitc28984d9ea08e7d995ef9fc8064c10ec0c0d9d77 (patch)
treec113582c3d2d8fb8d54a4c9a53375340fcc302d5 /src/soc/qualcomm
parent282c8322791800ee0d732fdaa5eb2cd8f7effd58 (diff)
downloadcoreboot-c28984d9ea08e7d995ef9fc8064c10ec0c0d9d77.tar.xz
spi: Clean up SPI flash driver interface
RW flag was added to spi_slave structure to get around a requirement on some AMD flash controllers that need to group together all spi volatile operations (write/erase). This rw flag is not a property or attribute of the SPI slave or controller. Thus, instead of saving it in spi_slave structure, clean up the SPI flash driver interface. This allows chipsets/mainboards (that require volatile operations to be grouped) to indicate beginning and end of such grouped operations. New user APIs are added to allow users to perform probe, read, write, erase, volatile group begin and end operations. Callbacks defined in spi_flash structure are expected to be used only by the SPI flash driver. Any chipset that requires grouping of volatile operations can select the newly added Kconfig option SPI_FLASH_HAS_VOLATILE_GROUP and define callbacks for chipset_volatile_group_{begin,end}. spi_claim_bus/spi_release_bus calls have been removed from the SPI flash chip drivers which end up calling do_spi_flash_cmd since it already has required calls for claiming and releasing SPI bus before performing a read/write operation. BUG=None BRANCH=None TEST=Compiles successfully. Change-Id: Idfc052e82ec15b6c9fa874cee7a61bd06e923fbf Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/17462 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/qualcomm')
-rw-r--r--src/soc/qualcomm/ipq40xx/include/soc/spi.h2
-rw-r--r--src/soc/qualcomm/ipq40xx/spi.c1
-rw-r--r--src/soc/qualcomm/ipq806x/include/soc/spi.h2
-rw-r--r--src/soc/qualcomm/ipq806x/spi.c1
4 files changed, 4 insertions, 2 deletions
diff --git a/src/soc/qualcomm/ipq40xx/include/soc/spi.h b/src/soc/qualcomm/ipq40xx/include/soc/spi.h
index 014b333667..1fd6a571ca 100644
--- a/src/soc/qualcomm/ipq40xx/include/soc/spi.h
+++ b/src/soc/qualcomm/ipq40xx/include/soc/spi.h
@@ -32,9 +32,9 @@
#ifndef _IPQ40XX_SPI_H_
#define _IPQ40XX_SPI_H_
-#include <spi_flash.h>
#include <soc/iomap.h>
#include <soc/qup.h>
+#include <spi-generic.h>
#define BLSP0_QUP_REG_BASE ((void *)0x78b5000u)
#define BLSP1_QUP_REG_BASE ((void *)0x78b6000u)
diff --git a/src/soc/qualcomm/ipq40xx/spi.c b/src/soc/qualcomm/ipq40xx/spi.c
index 8d39f77ae4..dcd00c0065 100644
--- a/src/soc/qualcomm/ipq40xx/spi.c
+++ b/src/soc/qualcomm/ipq40xx/spi.c
@@ -28,6 +28,7 @@
*/
#include <arch/io.h>
+#include <console/console.h>
#include <delay.h>
#include <gpio.h>
#include <soc/iomap.h>
diff --git a/src/soc/qualcomm/ipq806x/include/soc/spi.h b/src/soc/qualcomm/ipq806x/include/soc/spi.h
index 3e623463cc..4f6f055e61 100644
--- a/src/soc/qualcomm/ipq806x/include/soc/spi.h
+++ b/src/soc/qualcomm/ipq806x/include/soc/spi.h
@@ -6,7 +6,7 @@
#ifndef _IPQ806X_SPI_H_
#define _IPQ806X_SPI_H_
-#include <spi_flash.h>
+#include <spi-generic.h>
#include <soc/iomap.h>
#define QUP5_BASE ((uint32_t)GSBI_QUP5_BASE)
diff --git a/src/soc/qualcomm/ipq806x/spi.c b/src/soc/qualcomm/ipq806x/spi.c
index 4a353130e1..71a8c29085 100644
--- a/src/soc/qualcomm/ipq806x/spi.c
+++ b/src/soc/qualcomm/ipq806x/spi.c
@@ -3,6 +3,7 @@
*/
#include <arch/io.h>
+#include <console/console.h>
#include <delay.h>
#include <gpio.h>
#include <soc/iomap.h>