spi: Define and use spi_ctrlr structure

1. Define a new structure spi_ctrlr that allows platforms to define
callbacks for spi operations (claim bus, release bus, transfer).
2. Add a new member (pointer to spi_ctrlr structure) in spi_slave
structure which will be initialized by call to spi_setup_slave.
3. Define spi_claim_bus, spi_release_bus and spi_xfer in spi-generic.c
which will make appropriate calls to ctrlr functions.

BUG=chrome-os-partner:59832
BRANCH=None
TEST=Compiles successfully

Change-Id: Icb2326e3aab1e8f4bef53f553f82b3836358c55e
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/17684
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

2 files changed, 104 insertions, 90 deletions

diff --git a/src/soc/qualcomm/ipq40xx/spi.c b/src/soc/qualcomm/ipq40xx/spi.c
index cda3bea7e6..6d044b32f2 100644
--- a/src/soc/qualcomm/ipq40xx/spi.c
+++ b/src/soc/qualcomm/ipq40xx/spi.c
@@ -226,45 +226,6 @@ static struct ipq_spi_slave *to_ipq_spi(const struct spi_slave *slave)
 	return NULL;
 }
 
-int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
-{
-	struct ipq_spi_slave *ds = NULL;
-	int i;
-
-	if ((bus < BLSP0_SPI) || (bus > BLSP1_SPI)
-		|| ((bus == BLSP0_SPI) && (cs > 2))
-		|| ((bus == BLSP1_SPI) && (cs > 0))) {
-		printk(BIOS_ERR,
-			"SPI error: unsupported bus %d (Supported busses 0, 1 and 2) "
-                        "or chipselect\n", bus);
-		return -1;
-	}
-
-	for (i = 0; i < ARRAY_SIZE(spi_slave_pool); i++) {
-		if (spi_slave_pool[i].allocated)
-			continue;
-		ds = spi_slave_pool + i;
-
-		ds->slave.bus = slave->bus = bus;
-		ds->slave.cs = slave->cs = cs;
-		ds->regs = &spi_reg[bus];
-
-		/*
-		 * TODO(vbendeb):
-		 * hardcoded frequency and mode - we might need to find a way
-		 * to configure this
-		 */
-		ds->freq = 10000000;
-		ds->mode = SPI_MODE3;
-		ds->allocated = 1;
-
-		return 0;
-	}
-
-	printk(BIOS_ERR, "SPI error: all %d pools busy\n", i);
-	return -1;
-}
-
 /*
  * BLSP QUPn SPI Hardware Initialisation
  */
@@ -340,7 +301,7 @@ static int spi_hw_init(struct ipq_spi_slave *ds)
 	return SUCCESS;
 }
 
-int spi_claim_bus(const struct spi_slave *slave)
+static int spi_ctrlr_claim_bus(const struct spi_slave *slave)
 {
 	struct ipq_spi_slave *ds = to_ipq_spi(slave);
 	unsigned int ret;
@@ -352,7 +313,7 @@ int spi_claim_bus(const struct spi_slave *slave)
 	return SUCCESS;
 }
 
-void spi_release_bus(const struct spi_slave *slave)
+static void spi_ctrlr_release_bus(const struct spi_slave *slave)
 {
 	struct ipq_spi_slave *ds = to_ipq_spi(slave);
 
@@ -653,8 +614,8 @@ static int blsp_spi_write(struct ipq_spi_slave *ds, u8 *cmd_buffer,
  * This function is invoked with either tx_buf or rx_buf.
  * Calling this function with both null does a chip select change.
  */
-int spi_xfer(const struct spi_slave *slave, const void *dout,
-	     size_t out_bytes, void *din, size_t in_bytes)
+static int spi_ctrlr_xfer(const struct spi_slave *slave, const void *dout,
+			size_t out_bytes, void *din, size_t in_bytes)
 {
 	struct ipq_spi_slave *ds = to_ipq_spi(slave);
 	u8 *txp = (u8 *)dout;
@@ -690,3 +651,49 @@ out:
 
 	return ret;
 }
+
+static const struct spi_ctrlr spi_ctrlr = {
+	.claim_bus = spi_ctrlr_claim_bus,
+	.release_bus = spi_ctrlr_release_bus,
+	.xfer = spi_ctrlr_xfer,
+};
+
+int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
+{
+	struct ipq_spi_slave *ds = NULL;
+	int i;
+
+	if ((bus < BLSP0_SPI) || (bus > BLSP1_SPI)
+		|| ((bus == BLSP0_SPI) && (cs > 2))
+		|| ((bus == BLSP1_SPI) && (cs > 0))) {
+		printk(BIOS_ERR,
+			"SPI error: unsupported bus %d (Supported busses 0, 1 and 2) "
+                        "or chipselect\n", bus);
+		return -1;
+	}
+
+	for (i = 0; i < ARRAY_SIZE(spi_slave_pool); i++) {
+		if (spi_slave_pool[i].allocated)
+			continue;
+		ds = spi_slave_pool + i;
+
+		ds->slave.bus = slave->bus = bus;
+		ds->slave.cs = slave->cs = cs;
+		slave->ctrlr = &spi_ctrlr;
+		ds->regs = &spi_reg[bus];
+
+		/*
+		 * TODO(vbendeb):
+		 * hardcoded frequency and mode - we might need to find a way
+		 * to configure this
+		 */
+		ds->freq = 10000000;
+		ds->mode = SPI_MODE3;
+		ds->allocated = 1;
+
+		return 0;
+	}
+
+	printk(BIOS_ERR, "SPI error: all %d pools busy\n", i);
+	return -1;
+}
diff --git a/src/soc/qualcomm/ipq806x/spi.c b/src/soc/qualcomm/ipq806x/spi.c
index 81dc508cd7..e907729a13 100644
--- a/src/soc/qualcomm/ipq806x/spi.c
+++ b/src/soc/qualcomm/ipq806x/spi.c
@@ -518,49 +518,6 @@ static struct ipq_spi_slave *to_ipq_spi(const struct spi_slave *slave)
 	return NULL;
 }
 
-int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
-{
-	struct ipq_spi_slave *ds = NULL;
-	int i;
-
-	/*
-	 * IPQ GSBI (Generic Serial Bus Interface) supports SPI Flash
-	 * on different GSBI5, GSBI6 and GSBI7
-	 * with different number of chip selects (CS, channels):
-	*/
-	if ((bus < GSBI5_SPI) || (bus > GSBI7_SPI)
-		|| ((bus == GSBI5_SPI) && (cs > 3))
-		|| ((bus == GSBI6_SPI) && (cs > 0))
-		|| ((bus == GSBI7_SPI) && (cs > 0))) {
-		printk(BIOS_ERR, "SPI error: unsupported bus %d "
-			"(Supported busses 0,1 and 2) or chipselect\n", bus);
-	}
-
-	for (i = 0; i < ARRAY_SIZE(spi_slave_pool); i++) {
-		if (spi_slave_pool[i].allocated)
-			continue;
-		ds = spi_slave_pool + i;
-
-		ds->slave.bus = slave->bus = bus;
-		ds->slave.cs = slave->cs = cs;
-		ds->regs = &spi_reg[bus];
-
-		/*
-		 * TODO(vbendeb):
-		 * hardcoded frequency and mode - we might need to find a way
-		 * to configure this
-		 */
-		ds->freq = 10000000;
-		ds->mode = GSBI_SPI_MODE_0;
-		ds->allocated = 1;
-
-		return 0;
-	}
-
-	printk(BIOS_ERR, "SPI error: all %d pools busy\n", i);
-	return -1;
-}
-
 /*
  * GSBIn SPI Hardware Initialisation
  */
@@ -638,7 +595,7 @@ static int spi_hw_init(struct ipq_spi_slave *ds)
 	return SUCCESS;
 }
 
-int spi_claim_bus(const struct spi_slave *slave)
+static int spi_ctrlr_claim_bus(const struct spi_slave *slave)
 {
 	struct ipq_spi_slave *ds = to_ipq_spi(slave);
 	unsigned int ret;
@@ -661,7 +618,7 @@ int spi_claim_bus(const struct spi_slave *slave)
 	return SUCCESS;
 }
 
-void spi_release_bus(const struct spi_slave *slave)
+static void spi_ctrlr_release_bus(const struct spi_slave *slave)
 {
 	struct ipq_spi_slave *ds = to_ipq_spi(slave);
 
@@ -731,8 +688,8 @@ unsigned int spi_crop_chunk(unsigned int cmd_len, unsigned int buf_len)
 	return min(MAX_PACKET_COUNT, buf_len);
 }
 
-int spi_xfer(const struct spi_slave *slave, const void *dout,
-	     size_t out_bytes, void *din, size_t in_bytes)
+static int spi_ctrlr_xfer(const struct spi_slave *slave, const void *dout,
+			size_t out_bytes, void *din, size_t in_bytes)
 {
 	int ret;
 	struct ipq_spi_slave *ds = to_ipq_spi(slave);
@@ -799,3 +756,53 @@ out:
 
 	return ret;
 }
+
+static const struct spi_ctrlr spi_ctrlr = {
+	.claim_bus = spi_ctrlr_claim_bus,
+	.release_bus = spi_ctrlr_release_bus,
+	.xfer = spi_ctrlr_xfer,
+};
+
+int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
+{
+	struct ipq_spi_slave *ds = NULL;
+	int i;
+
+	/*
+	 * IPQ GSBI (Generic Serial Bus Interface) supports SPI Flash
+	 * on different GSBI5, GSBI6 and GSBI7
+	 * with different number of chip selects (CS, channels):
+	*/
+	if ((bus < GSBI5_SPI) || (bus > GSBI7_SPI)
+		|| ((bus == GSBI5_SPI) && (cs > 3))
+		|| ((bus == GSBI6_SPI) && (cs > 0))
+		|| ((bus == GSBI7_SPI) && (cs > 0))) {
+		printk(BIOS_ERR, "SPI error: unsupported bus %d "
+			"(Supported busses 0,1 and 2) or chipselect\n", bus);
+	}
+
+	for (i = 0; i < ARRAY_SIZE(spi_slave_pool); i++) {
+		if (spi_slave_pool[i].allocated)
+			continue;
+		ds = spi_slave_pool + i;
+
+		ds->slave.bus = slave->bus = bus;
+		ds->slave.cs = slave->cs = cs;
+		slave->ctrlr = &spi_ctrlr;
+		ds->regs = &spi_reg[bus];
+
+		/*
+		 * TODO(vbendeb):
+		 * hardcoded frequency and mode - we might need to find a way
+		 * to configure this
+		 */
+		ds->freq = 10000000;
+		ds->mode = GSBI_SPI_MODE_0;
+		ds->allocated = 1;
+
+		return 0;
+	}
+
+	printk(BIOS_ERR, "SPI error: all %d pools busy\n", i);
+	return -1;
+}