diff options
| author | Nickey Yang <nickey.yang@rock-chips.com> | 2017-04-27 09:38:06 +0800 |
|---|---|---|
| committer | Julius Werner <jwerner@chromium.org> | 2017-05-18 01:00:09 +0200 |
| commit | fe122d4dfc130be1e87b367b0dc9b39044b262bd (patch) | |
| tree | 021e8b921fcdfd1d6af2ea62a57fd4c4af7a48c7 /src/soc/rockchip/common | |
| parent | 2684efc49213802dcd36bd9bddd7a69851b8774a (diff) | |
| download | coreboot-fe122d4dfc130be1e87b367b0dc9b39044b262bd.tar.xz | |
rockchip/rk3399: Add MIPI driver
This patch configures clock for mipi and then
adds mipi driver for support innolux-p079zca
mipi panel in rk3399 scarlet.
Change-Id: I02475eefb187c619c614b1cd20e97074bc8d917f
Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
Reviewed-on: https://review.coreboot.org/19477
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/soc/rockchip/common')
| -rw-r--r-- | src/soc/rockchip/common/include/soc/vop.h | 1 | ||||
| -rw-r--r-- | src/soc/rockchip/common/vop.c | 16 |
2 files changed, 13 insertions, 4 deletions
diff --git a/src/soc/rockchip/common/include/soc/vop.h b/src/soc/rockchip/common/include/soc/vop.h index 98ad08255a..c5c542583d 100644 --- a/src/soc/rockchip/common/include/soc/vop.h +++ b/src/soc/rockchip/common/include/soc/vop.h @@ -119,6 +119,7 @@ enum vop_modes { */ VOP_MODE_EDP = 0, VOP_MODE_HDMI, + VOP_MODE_MIPI, VOP_MODE_NONE, VOP_MODE_AUTO_DETECT, VOP_MODE_UNKNOWN, diff --git a/src/soc/rockchip/common/vop.c b/src/soc/rockchip/common/vop.c index 629072e22e..70d59bd6a8 100644 --- a/src/soc/rockchip/common/vop.c +++ b/src/soc/rockchip/common/vop.c @@ -24,7 +24,6 @@ #include <soc/edp.h> #include <soc/vop.h> - static struct rockchip_vop_regs * const vop_regs[] = { (struct rockchip_vop_regs *)VOP_BIG_BASE, (struct rockchip_vop_regs *)VOP_LIT_BASE @@ -109,6 +108,7 @@ void rkvop_mode_set(u32 vop_id, const struct edid *edid, u32 mode) u32 vfront_porch = edid->mode.vso; u32 vsync_len = edid->mode.vspw; u32 vback_porch = edid->mode.vbl - edid->mode.vso - edid->mode.vspw; + u32 dsp_out_mode; struct rockchip_vop_regs *preg = vop_regs[vop_id]; switch (mode) { @@ -116,17 +116,25 @@ void rkvop_mode_set(u32 vop_id, const struct edid *edid, u32 mode) case VOP_MODE_HDMI: clrsetbits_le32(&preg->sys_ctrl, M_ALL_OUT_EN, V_HDMI_OUT_EN(1)); + dsp_out_mode = 15; + break; + case VOP_MODE_MIPI: + clrsetbits_le32(&preg->sys_ctrl, + M_ALL_OUT_EN, V_MIPI_OUT_EN(1)); + dsp_out_mode = 0; break; - case VOP_MODE_EDP: default: clrsetbits_le32(&preg->sys_ctrl, M_ALL_OUT_EN, V_EDP_OUT_EN(1)); + dsp_out_mode = 15; break; } + clrsetbits_le32(&preg->dsp_ctrl0, - M_DSP_OUT_MODE | M_DSP_VSYNC_POL | M_DSP_HSYNC_POL, - V_DSP_OUT_MODE(15) | + M_DSP_OUT_MODE | M_DSP_VSYNC_POL | + M_DSP_HSYNC_POL, + V_DSP_OUT_MODE(dsp_out_mode) | V_DSP_HSYNC_POL(edid->mode.phsync == '+') | V_DSP_VSYNC_POL(edid->mode.pvsync == '+')); |