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authorDaisuke Nojiri <dnojiri@chromium.org>2014-09-24 09:39:16 -0700
committerAaron Durbin <adurbin@google.com>2015-04-02 20:46:17 +0200
commit5c2988c4616d8326f56037e7ef5e8280c134ef7d (patch)
tree4b9d802bdb193e4ea12399ddec69e1b3965cbba5 /src/soc/rockchip/rk3288/bootblock.c
parent8d9a1bd5a84df71965488bfc49f07bdc1dcc1f9a (diff)
downloadcoreboot-5c2988c4616d8326f56037e7ef5e8280c134ef7d.tar.xz
veyron: select rw romstage using vboot2
this change makes veyron pinky to select a rw romstage using vboot2. BUG=None TEST=Booted Veyron Pinky. Verified firmware selection in the log. BRANCH=None Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> CQ-DEPEND=CL:219100 Original-Change-Id: Ia1cfdacde9f8b17b00e7772a02e0d266afedb82f Original-Reviewed-on: https://chromium-review.googlesource.com/219103 Original-Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> (cherry picked from commit 69c1e4b9ee200645d38d28165389aa85ef9b36cd) Signed-off-by: Aaron Durbin <adurbin@chromium.org> Change-Id: I7b4a2db8bcb95038dfb55bb7ceee66ac4a6c9475 Reviewed-on: http://review.coreboot.org/9234 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/soc/rockchip/rk3288/bootblock.c')
-rw-r--r--src/soc/rockchip/rk3288/bootblock.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/src/soc/rockchip/rk3288/bootblock.c b/src/soc/rockchip/rk3288/bootblock.c
index 76a91d234d..635eee45b3 100644
--- a/src/soc/rockchip/rk3288/bootblock.c
+++ b/src/soc/rockchip/rk3288/bootblock.c
@@ -25,14 +25,21 @@
#include "clock.h"
#include "grf.h"
#include "spi.h"
+#include <vendorcode/google/chromeos/chromeos.h>
static void bootblock_cpu_init(void)
{
writel(IOMUX_UART2, &rk3288_grf->iomux_uart2);
writel(IOMUX_SPI2_CSCLK, &rk3288_grf->iomux_spi2csclk);
writel(IOMUX_SPI2_TXRX, &rk3288_grf->iomux_spi2txrx);
+ /*i2c1 for tpm*/
+ writel(IOMUX_I2C1, &rk3288_grf->iomux_i2c1);
+ /* spi0 for chrome ec */
+ writel(IOMUX_SPI0, &rk3288_grf->iomux_spi0);
rk3288_init_timer();
console_init();
rkclk_init();
rockchip_spi_init(CONFIG_BOOT_MEDIA_SPI_BUS);
+ rockchip_spi_init(CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS);
+ setup_chromeos_gpios();
}