diff options
| author | huang lin <hl@rock-chips.com> | 2014-09-25 16:33:38 +0800 |
|---|---|---|
| committer | Aaron Durbin <adurbin@google.com> | 2015-04-02 21:16:45 +0200 |
| commit | bfdd732b80a56e31d3bbe59de76a6a91b0f5b9e4 (patch) | |
| tree | 6ab65295596023084a4f08ffa6addc38aae7ab8e /src/soc/rockchip/rk3288/clock.h | |
| parent | bbcffd9e25e12a8ee5858ac580aa7e86ecf32ee5 (diff) | |
| download | coreboot-bfdd732b80a56e31d3bbe59de76a6a91b0f5b9e4.tar.xz | |
rockchip: support pwm regulator
BUG=None
TEST=Boot Veyron Pinky and test the VDD_LOG
Original-Change-Id: Ie2eef918e04ba0e13879e915b0b0bef44aef550e
Original-Signed-off-by: huang lin <hl@rock-chips.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/219753
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Original-Commit-Queue: Julius Werner <jwerner@chromium.org>
Change-Id: I444b47564d90b3480b351fdd8460e5b94e71927c
(cherry picked from commit 4491d9c4037161fd8c4cc40856167bf73182fda6)
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/9240
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/soc/rockchip/rk3288/clock.h')
| -rw-r--r-- | src/soc/rockchip/rk3288/clock.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/src/soc/rockchip/rk3288/clock.h b/src/soc/rockchip/rk3288/clock.h index 452d352194..b206baa006 100644 --- a/src/soc/rockchip/rk3288/clock.h +++ b/src/soc/rockchip/rk3288/clock.h @@ -26,6 +26,14 @@ #define GPLL_HZ 594000000 #define CPLL_HZ 384000000 +#define PD_BUS_ACLK_HZ 148500000 +#define PD_BUS_HCLK_HZ 148500000 +#define PD_BUS_PCLK_HZ 74250000 + +#define PERI_ACLK_HZ 148500000 +#define PERI_HCLK_HZ 148500000 +#define PERI_PCLK_HZ 74250000 + void rkclk_init(void); void rkclk_configure_spi(unsigned int bus, unsigned int hz); void rkclk_ddr_reset(u32 ch, u32 ctl, u32 phy); |