diff options
| author | Julius Werner <jwerner@chromium.org> | 2014-12-15 13:09:01 -0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-04-14 09:03:57 +0200 |
| commit | b863425402db859e0d9ec569f3f98f9756ed516f (patch) | |
| tree | de12f0aa21e88d0f9bc6b1d3f50df7e9a7b0cd4a /src/soc/rockchip/rk3288/include | |
| parent | a7d924412a4300e91b3bd6eb3581b954b02f8d37 (diff) | |
| download | coreboot-b863425402db859e0d9ec569f3f98f9756ed516f.tar.xz | |
rk3288: Fix memlayout to allow a little more bootblock space
Freeing up memory on rk3288 is like squeezing water out of a stone right
now, but I still managed to get a few drops here and there. Let's hope
this will be enough.
BRANCH=None
BUG=None
TEST=Pinky builds and boots again. memsz is ~15K in bootblock and ~39K
in verstage.
Change-Id: Icf7ff3369bf367426a34f1490e0a041ae9bd6367
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 9a3737ab535cdef228a1607433860f881db04412
Original-Change-Id: I90d9eab5b5d3af7a2e4b836a9c7b735b7c1c48e6
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/235870
Original-Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: http://review.coreboot.org/9609
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc/rockchip/rk3288/include')
| -rw-r--r-- | src/soc/rockchip/rk3288/include/soc/memlayout.ld | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/src/soc/rockchip/rk3288/include/soc/memlayout.ld b/src/soc/rockchip/rk3288/include/soc/memlayout.ld index e5c44a00eb..bb5af41dc1 100644 --- a/src/soc/rockchip/rk3288/include/soc/memlayout.ld +++ b/src/soc/rockchip/rk3288/include/soc/memlayout.ld @@ -34,13 +34,13 @@ SECTIONS SRAM_START(0xFF700000) TTB(0xFF700000, 16K) - BOOTBLOCK(0xFF704004, 15K - 4) - TTB_SUBTABLES(0xFF707C00, 1K) - PRERAM_CBMEM_CONSOLE(0xFF708000, 4K) - VBOOT2_WORK(0xFF709000, 12K) - OVERLAP_VERSTAGE_ROMSTAGE(0xFF70C000, 40K) - PRERAM_CBFS_CACHE(0xFF716000, 4K) - STACK(0xFF717000, 4K) + BOOTBLOCK(0xFF704004, 17K - 4) + TTB_SUBTABLES(0xFF708400, 1K) + PRERAM_CBMEM_CONSOLE(0xFF708800, 4K) + VBOOT2_WORK(0xFF709800, 12K) + OVERLAP_VERSTAGE_ROMSTAGE(0xFF70C800, 42K) + PRERAM_CBFS_CACHE(0xFF717000, 1K) + STACK(0xFF717580, 3K - 0x180) SRAM_END(0xFF718000) /* 4K of special SRAM in PMU power domain. |