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| author | Jacob Garber <jgarber1@ualberta.ca> | 2019-06-11 12:45:51 -0600 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-07-19 09:57:32 +0000 |
| commit | 78107939de6e2c4b66de6bd1370607f7d3a600f0 (patch) | |
| tree | 01e08649910d70b4c04690e1e3e3da291416b5b1 /src/soc/rockchip/rk3288 | |
| parent | 589eff7e476f452773bb3cc2ca1469446e2097f4 (diff) | |
| download | coreboot-78107939de6e2c4b66de6bd1370607f7d3a600f0.tar.xz | |
nb/intel/pineview: Remove dead code in switch
This switch was likely copy-pasted from the one right above it. However,
the MEM_CLOCK_800MHz case isn't needed, since that is explicitly checked
and avoided before the while loop. With that gone, only the
667MHz/default case is left, which we don't need to switch over anymore.
Change-Id: Idfb9cc27dd8718f627d15ba92a9c74c51c2c1c2d
Signed-off-by: Jacob Garber <jgarber1@ualberta.ca>
Found-by: Coverity CID 1347372
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33407
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/rockchip/rk3288')
0 files changed, 0 insertions, 0 deletions