diff options
author | Shunqian Zheng <zhengsq@rock-chips.com> | 2016-05-02 10:27:30 +0800 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2016-05-18 20:23:42 +0200 |
commit | 462e14139e4990caa23d23476e60f5d3ba95c9aa (patch) | |
tree | f0b9d4f8270633bc75d66e50ec364f3152742c03 /src/soc/rockchip/rk3399/emmc.c | |
parent | 2f7ed8d775153db69d19c77cc79db9b0bb136c70 (diff) | |
download | coreboot-462e14139e4990caa23d23476e60f5d3ba95c9aa.tar.xz |
rockchip: rk3399: enable sdhci clk for emmc
If booting from sdcard/usb, kernel can't recognize the
/dev/mmcblk0.
Before kernel find it's root cause, we add this workaround
patch to enable clk for emmc.
BRANCH=none
BUG=chrome-os-partner:52873
TEST=boot from sdcard and check the /dev/mmcblk0 exists
Change-Id: Ie36cc6fdbc24db8c30984c02ccfe2f8aaaf30cd2
Signed-off-by: Martin Roth <martinroth@google.com>
Original-Commit-Id: 39b87ec3c73d6f56efc8c3f52b7ed759e548ee85
Original-Change-Id: I88a9cc2e3ea5a56aadfdbd94ef910daaf92a7eb7
Original-Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/341632
Original-Commit-Ready: Vadim Bendebury <vbendeb@chromium.org>
Original-Tested-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://review.coreboot.org/14856
Tested-by: build bot (Jenkins)
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Diffstat (limited to 'src/soc/rockchip/rk3399/emmc.c')
-rw-r--r-- | src/soc/rockchip/rk3399/emmc.c | 50 |
1 files changed, 50 insertions, 0 deletions
diff --git a/src/soc/rockchip/rk3399/emmc.c b/src/soc/rockchip/rk3399/emmc.c new file mode 100644 index 0000000000..b8519f7796 --- /dev/null +++ b/src/soc/rockchip/rk3399/emmc.c @@ -0,0 +1,50 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2016 Rockchip Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <arch/io.h> +#include <console/console.h> +#include <delay.h> +#include <soc/addressmap.h> +#include <soc/emmc.h> + +#define SDHCI_CLOCK_CONTROL 0x2c +#define SDHCI_CLOCK_CARD_EN 0x0004 +#define SDHCI_CLOCK_INT_STABLE 0x0002 +#define SDHCI_CLOCK_INT_EN 0x0001 + +/* TODO(crosbug.com/p/52873): We actually don't need to set clk for + * emmc once kernel fix it's bug. + */ +void enable_emmc_clk(void) +{ + int timeout, clk; + + write32((void *)(EMMC_BASE + SDHCI_CLOCK_CONTROL), SDHCI_CLOCK_INT_EN); + + /* Wait max 20 ms */ + timeout = 20; + while (!((clk = read32((void *)(EMMC_BASE + SDHCI_CLOCK_CONTROL))) + & SDHCI_CLOCK_INT_STABLE)) { + if (timeout == 0) { + printk(BIOS_ERR, "Internal clock never stabilised.\n"); + return; + } + timeout--; + udelay(1000); + } + + clk |= SDHCI_CLOCK_CARD_EN; + write32((void *)(EMMC_BASE + SDHCI_CLOCK_CONTROL), clk); +} |