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authorLin Huang <hl@rock-chips.com>2017-11-22 09:40:50 +0800
committerJulius Werner <jwerner@chromium.org>2017-11-28 19:16:09 +0000
commit25fb09b0684769bd010cde0aa60f1b32eddb2cba (patch)
treedb7ef455bfcb34369603f6513e3eeb8c8b8cd2c4 /src/soc/rockchip/rk3399/include
parent45f1b01324ed1712092e80fed7e03fe088452729 (diff)
downloadcoreboot-25fb09b0684769bd010cde0aa60f1b32eddb2cba.tar.xz
rockchip/rk3399: support dual mipi dsi
Refactor the mipi driver, so we can support dual mipi panel. And pass the panel data from mainboard.c, that we can support different panel with different board. Change-Id: Id1286c0ccbe50c89514c8daee66439116d3f1ca4 Signed-off-by: Lin Huang <hl@rock-chips.com> Reviewed-on: https://review.coreboot.org/22471 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Brian Norris <briannorris@chromium.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/soc/rockchip/rk3399/include')
-rw-r--r--src/soc/rockchip/rk3399/include/soc/addressmap.h3
-rw-r--r--src/soc/rockchip/rk3399/include/soc/display.h5
-rw-r--r--src/soc/rockchip/rk3399/include/soc/mipi.h24
3 files changed, 27 insertions, 5 deletions
diff --git a/src/soc/rockchip/rk3399/include/soc/addressmap.h b/src/soc/rockchip/rk3399/include/soc/addressmap.h
index 7a365adb86..5dca6bb84e 100644
--- a/src/soc/rockchip/rk3399/include/soc/addressmap.h
+++ b/src/soc/rockchip/rk3399/include/soc/addressmap.h
@@ -59,7 +59,8 @@
#define SARADC_BASE 0xff100000
#define RK_PWM_BASE 0xff420000
#define EDP_BASE 0xff970000
-#define MIPI_BASE 0xff960000
+#define MIPI0_BASE 0xff960000
+#define MIPI1_BASE 0xff968000
#define VOP_BIG_BASE 0xff900000 /* corresponds to vop_id 0 */
#define VOP_LIT_BASE 0xff8f0000 /* corresponds to vop_id 1 */
diff --git a/src/soc/rockchip/rk3399/include/soc/display.h b/src/soc/rockchip/rk3399/include/soc/display.h
index c10f1b9f04..bf90f651a6 100644
--- a/src/soc/rockchip/rk3399/include/soc/display.h
+++ b/src/soc/rockchip/rk3399/include/soc/display.h
@@ -16,9 +16,12 @@
#ifndef __SOC_ROCKCHIP_RK3399_DISPLAY_H__
#define __SOC_ROCKCHIP_RK3399_DISPLAY_H__
+#include <edid.h>
+#include <soc/mipi.h>
+
#define REF_CLK_24M (0x1 << 0)
void rk_display_init(device_t dev);
void mainboard_power_on_backlight(void);
-
+const struct mipi_panel_data *mainboard_get_mipi_mode(struct edid *edid);
#endif
diff --git a/src/soc/rockchip/rk3399/include/soc/mipi.h b/src/soc/rockchip/rk3399/include/soc/mipi.h
index 09285cf51c..933ea89bd4 100644
--- a/src/soc/rockchip/rk3399/include/soc/mipi.h
+++ b/src/soc/rockchip/rk3399/include/soc/mipi.h
@@ -263,8 +263,9 @@ check_member(rk_mipi_regs, dsi_int_msk1, 0xc8);
#define GEN_PLD_R_FULL BIT(5)
#define GEN_RD_CMD_BUSY BIT(6)
-#define MIPI_DSI_DCS_SHORT_WRITE 0x05
-#define MIPI_DSI_DCS_LONG_WRITE 0x39
+#define MIPI_DSI_DCS_SHORT_WRITE 0x05
+#define MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM 0x23
+#define MIPI_DSI_DCS_LONG_WRITE 0x39
enum mipi_dsi_pixel_format {
MIPI_DSI_FMT_RGB888,
@@ -314,6 +315,7 @@ struct dphy_pll_parameter_map {
};
struct rk_mipi_dsi {
+ struct rk_mipi_regs *mipi_regs;
u64 lane_bps; /* per lane */
u32 lanes;
u32 format;
@@ -321,5 +323,21 @@ struct rk_mipi_dsi {
u16 feedback_div;
};
-void rk_mipi_prepare(const struct edid *edid, u32 display_on_mdelay, u32 video_mode_mdelay);
+struct panel_init_command {
+ u8 cmd;
+ u8 data;
+};
+
+struct mipi_panel_data {
+ u8 mipi_num;
+ enum mipi_dsi_pixel_format format;
+ u8 lanes;
+ u32 display_on_udelay;
+ u32 video_mode_udelay;
+ u32 num_init_commands;
+ struct panel_init_command *init_cmd;
+};
+
+void rk_mipi_prepare(const struct edid *edid,
+ const struct mipi_panel_data *panel_data);
#endif