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authorLin Huang <hl@rock-chips.com>2016-07-11 16:48:17 +0800
committerMartin Roth <martinroth@google.com>2016-07-15 00:38:15 +0200
commit0776fcb1b5fba1e5df08cc8b0f436d6c7564516f (patch)
treeaa1b02178bd70428ceacd9f65cbab35c844dd911 /src/soc/rockchip/rk3399
parenta406c2a954830e8cad2efdd4210f1a240c5342bc (diff)
downloadcoreboot-0776fcb1b5fba1e5df08cc8b0f436d6c7564516f.tar.xz
rockchip/rk3399: extend romstage range
rk3399 sdram size is 192K, and there still some unused space. We need more romstage space to include the sdram config, so extend the romstage range. BRANCH=none BUG=chrome-os-partner:54871 TEST=run "stressapptest -M 1024 -s 1000" on kevin board and pass Change-Id: Ib827345fe646e985773e6ce3e98ac3f64317fffb Signed-off-by: Martin Roth <martinroth@chromium.org> Original-Commit-Id: 626ab15bb4ebb004d5294b948bbdecc77a72a484 Original-Change-Id: Ib5aa1e1b942cde8d9476773f5a84ac70bb830c80 Original-Signed-off-by: Lin Huang <hl@rock-chips.com> Original-Reviewed-on: https://chromium-review.googlesource.com/359092 Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/15660 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/rockchip/rk3399')
-rw-r--r--src/soc/rockchip/rk3399/include/soc/memlayout.ld10
1 files changed, 5 insertions, 5 deletions
diff --git a/src/soc/rockchip/rk3399/include/soc/memlayout.ld b/src/soc/rockchip/rk3399/include/soc/memlayout.ld
index 0ad99391d4..96dd108a1c 100644
--- a/src/soc/rockchip/rk3399/include/soc/memlayout.ld
+++ b/src/soc/rockchip/rk3399/include/soc/memlayout.ld
@@ -28,10 +28,10 @@ SECTIONS
BOOTBLOCK(0xFF8C2004, 31K - 4)
PRERAM_CBMEM_CONSOLE(0xFF8C9C00, 5K)
PRERAM_CBFS_CACHE(0xFF8CB000, 4K)
- OVERLAP_VERSTAGE_ROMSTAGE(0xFF8CC000, 64K)
- VBOOT2_WORK(0XFF8DC000, 12K)
- TTB(0xFF8DF000, 32K)
- TIMESTAMP(0xFF8E7000, 1K)
- STACK(0xFF8E7400, 24K)
+ TTB(0xFF8CC000, 32K)
+ OVERLAP_VERSTAGE_ROMSTAGE(0xFF8D4000, 75K)
+ VBOOT2_WORK(0XFF8E6C00, 12K)
+ TIMESTAMP(0xFF8E9C00, 1K)
+ STACK(0xFF8EA000, 24K)
SRAM_END(0xFF8F0000)
}