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authorVadim Bendebury <vbendeb@chromium.org>2016-07-04 19:40:39 -0700
committerMartin Roth <martinroth@google.com>2016-07-13 23:57:33 +0200
commit690ac93aa00c7b197a6b5245acaa0d65d411e12e (patch)
tree1d75d1c4a119f4b89d2321c1ad28e4d78de38c69 /src/soc/rockchip/rk3399
parent061e4ff3620a40ceb329155328235d0bc78a64b3 (diff)
downloadcoreboot-690ac93aa00c7b197a6b5245acaa0d65d411e12e.tar.xz
rk3399: allow more room for CBMEM console
With recent bootblock code additions the CBMEM console buffer is not large enough to store the entire log accumulated before DRAM is initialized, spilling 700 bytes or so on the floor. This patch adds 1 KB to the CBMEM console buffer, at the expense of the bootblock area in SRAM. The bootblock is taking less then 26K out of 31K allocated for it after this change. Placing CBMEM console area right after the bootblock makes sure other memory regions are not going to be affected should memory distribution between bootblock and CBMEM console need to change again. BRANCH=none BUG=none TEST=examining /sys/firmware/log after device boots up into Chrome OS does not report truncated console buffer any more. Change-Id: I016460f57c70dab4d603d4c5dbfc5ffbc6c3554f Signed-off-by: Martin Roth <martinroth@chromium.org> Original-Commit-Id: bfa31684a1a9be87f39143cb6c07885a7b2e4843 Original-Change-Id: I2c3d198803e6f083ddd1d8447aa377ebf85484ce Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/358125 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/15607 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/soc/rockchip/rk3399')
-rw-r--r--src/soc/rockchip/rk3399/include/soc/memlayout.ld6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/soc/rockchip/rk3399/include/soc/memlayout.ld b/src/soc/rockchip/rk3399/include/soc/memlayout.ld
index ac16394c86..0ad99391d4 100644
--- a/src/soc/rockchip/rk3399/include/soc/memlayout.ld
+++ b/src/soc/rockchip/rk3399/include/soc/memlayout.ld
@@ -25,9 +25,9 @@ SECTIONS
FRAMEBUFFER(0x10200000, 8M)
SRAM_START(0xFF8C0000)
- BOOTBLOCK(0xFF8C2004, 32K - 4)
- PRERAM_CBFS_CACHE(0xFF8CA000, 4K)
- PRERAM_CBMEM_CONSOLE(0xFF8CB000, 4K)
+ BOOTBLOCK(0xFF8C2004, 31K - 4)
+ PRERAM_CBMEM_CONSOLE(0xFF8C9C00, 5K)
+ PRERAM_CBFS_CACHE(0xFF8CB000, 4K)
OVERLAP_VERSTAGE_ROMSTAGE(0xFF8CC000, 64K)
VBOOT2_WORK(0XFF8DC000, 12K)
TTB(0xFF8DF000, 32K)