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authorDerek Basehore <dbasehore@chromium.org>2016-06-20 14:06:42 -0700
committerMartin Roth <martinroth@google.com>2016-07-15 00:37:41 +0200
commit8cb974e83e00c126fc967d9c2eec307ac72fa6a2 (patch)
tree7e23e668bd5258a966db593b22012cf20d94f187 /src/soc/rockchip/rk3399
parent5282fe62d47a3359373d747cd093e920fe429338 (diff)
downloadcoreboot-8cb974e83e00c126fc967d9c2eec307ac72fa6a2.tar.xz
rockchip/rk3399: Remove empty function in sdram.c
This removes an empty function for sdram training. If it's needed later, we can always add it back. BRANCH=none BUG=none TEST=build and boot firmware for kevin/gru Change-Id: Id526ef86cf5044894a1a736cc39f10d32f49c072 Signed-off-by: Martin Roth <martinroth@chromium.org> Original-Commit-Id: 3e93461b96bfadc08bf0b46cf99052d9cdffa422 Original-Change-Id: I6bf77d2f81719c68cd78722c3fe9ae547ea1e79c Original-Signed-off-by: Derek Basehore <dbasehore@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/354164 Original-Reviewed-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/15657 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/rockchip/rk3399')
-rw-r--r--src/soc/rockchip/rk3399/sdram.c5
1 files changed, 0 insertions, 5 deletions
diff --git a/src/soc/rockchip/rk3399/sdram.c b/src/soc/rockchip/rk3399/sdram.c
index 47fa09819d..5ef6479399 100644
--- a/src/soc/rockchip/rk3399/sdram.c
+++ b/src/soc/rockchip/rk3399/sdram.c
@@ -111,10 +111,6 @@ static void copy_to_reg(u32 *dest, const u32 *src, u32 n)
}
}
-static void ddr_move_to_access_state(u32 channel)
-{
-}
-
static void phy_dll_bypass_set(u32 channel,
struct rk3399_ddr_publ_regs *ddr_publ_regs, u32 freq)
{
@@ -955,7 +951,6 @@ void sdram_init(const struct rk3399_sdram_params *sdram_params)
set_ddrconfig(sdram_params, channel,
sdram_params->ch[channel].ddrconfig);
- ddr_move_to_access_state(channel);
}
dram_all_config(sdram_params);
printk(BIOS_INFO, "Finish SDRAM initialization...\n");