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authorDavid Hendricks <dhendrix@chromium.org>2014-09-29 18:54:55 -0700
committerAaron Durbin <adurbin@google.com>2015-04-04 04:03:32 +0200
commit9dceb0e30abe5d91bca0c7d6af3fe82281e82865 (patch)
tree78d3e8a7f9eff8b278127fa87de72d329f2219f1 /src/soc/rockchip
parentb4ff291cf6999651cd29b3df671049feffeb5e48 (diff)
downloadcoreboot-9dceb0e30abe5d91bca0c7d6af3fe82281e82865.tar.xz
rk3288: Replace SPI fifo_size with constant
rockchip_spi_slave has a fifo_size member which doesn't change. This just replaces the struct member with a #define. BUG=none BRANCH=none TEST=built and booted on Pinky Original-Signed-off-by: David Hendricks <dhendrix@chromium.org> Original-Change-Id: I9ea5cdad49ee10c5f32304d0909c4a7e74a261f9 Original-Reviewed-on: https://chromium-review.googlesource.com/220471 Original-Reviewed-by: Julius Werner <jwerner@chromium.org> (cherry picked from commit f76cce3b38ac37f4df8abf6eebb8f7c7b29da095) Signed-off-by: Aaron Durbin <adurbin@chromium.org> Change-Id: I3ab4eecfcce98aff3f6c9bd8f6c4e589784c60be Reviewed-on: http://review.coreboot.org/9246 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Diffstat (limited to 'src/soc/rockchip')
-rw-r--r--src/soc/rockchip/rk3288/spi.c18
1 files changed, 6 insertions, 12 deletions
diff --git a/src/soc/rockchip/rk3288/spi.c b/src/soc/rockchip/rk3288/spi.c
index 3fb7291085..431b2d37f4 100644
--- a/src/soc/rockchip/rk3288/spi.c
+++ b/src/soc/rockchip/rk3288/spi.c
@@ -33,11 +33,11 @@
struct rockchip_spi_slave {
struct spi_slave slave;
struct rockchip_spi *regs;
- unsigned int fifo_size;
};
#define SPI_TIMEOUT_US 1000
#define SPI_SRCCLK_HZ 99000000
+#define SPI_FIFO_DEPTH 32
static struct rockchip_spi_slave rockchip_spi_slaves[3] = {
{
@@ -46,12 +46,10 @@ static struct rockchip_spi_slave rockchip_spi_slaves[3] = {
.rw = SPI_READ_FLAG | SPI_WRITE_FLAG,
},
.regs = (void *)SPI0_BASE,
- .fifo_size = 32,
},
{
.slave = {.bus = 1, .rw = SPI_READ_FLAG,},
.regs = (void *)SPI1_BASE,
- .fifo_size = 32,
},
{
.slave = {
@@ -59,7 +57,6 @@ static struct rockchip_spi_slave rockchip_spi_slaves[3] = {
.rw = SPI_READ_FLAG | SPI_WRITE_FLAG,
},
.regs = (void *)SPI2_BASE,
- .fifo_size = 32,
},
};
@@ -108,8 +105,7 @@ static void rockchip_spi_set_clk(struct rockchip_spi *regs, unsigned int hz)
void rockchip_spi_init(unsigned int bus, unsigned int speed_hz)
{
- struct rockchip_spi_slave *espi = &rockchip_spi_slaves[bus];
- struct rockchip_spi *regs = espi->regs;
+ struct rockchip_spi *regs = rockchip_spi_slaves[bus].regs;
unsigned int ctrlr0 = 0;
rkclk_configure_spi(bus, SPI_SRCCLK_HZ);
@@ -145,9 +141,9 @@ void rockchip_spi_init(unsigned int bus, unsigned int speed_hz)
writel(ctrlr0, &regs->ctrlr0);
- /*fifo depth */
- writel(espi->fifo_size / 2 - 1, &regs->txftlr);
- writel(espi->fifo_size / 2 - 1, &regs->rxftlr);
+ /* fifo depth */
+ writel(SPI_FIFO_DEPTH / 2 - 1, &regs->txftlr);
+ writel(SPI_FIFO_DEPTH / 2 - 1, &regs->rxftlr);
}
int spi_claim_bus(struct spi_slave *slave)
@@ -182,7 +178,6 @@ int spi_xfer(struct spi_slave *slave, const void *dout, unsigned int sout,
unsigned int bytes_remaining;
uint8_t *p;
struct rockchip_spi *regs = to_rockchip_spi(slave)->regs;
- struct rockchip_spi_slave *espi = to_rockchip_spi(slave);
if (dout) {
len = sout;
@@ -196,8 +191,7 @@ int spi_xfer(struct spi_slave *slave, const void *dout, unsigned int sout,
SPI_TMOD_TO << SPI_TMOD_OFFSET);
writel(1, &regs->spienr);/*enable spi */
while (bytes_remaining) {
- if ((readl(&regs->txflr) & 0x3f)
- < espi->fifo_size) {
+ if ((readl(&regs->txflr) & 0x3f) < SPI_FIFO_DEPTH) {
writel(*p++, &regs->txdr);
bytes_remaining--;
}