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authorDavid Hendricks <dhendrix@chromium.org>2015-09-25 15:31:03 -0700
committerPatrick Georgi <pgeorgi@google.com>2015-10-25 07:32:10 +0100
commitf23216dc5b93c72755010eab867b37937d601645 (patch)
tree60943eabdb83f450742775b2d59c7774ddbd38a9 /src/soc/rockchip
parentfd9cdf6dec65aa4d6fd36cc6983c2f24f83c623e (diff)
downloadcoreboot-f23216dc5b93c72755010eab867b37937d601645.tar.xz
rockchip/rk3288: Remove 1392MHz option for RK3288 APLL
It's no longer used. BUG=none BRANCH=none TEST=it compiles Change-Id: I3d9385e0e1f14977c1632f3a8dda771c684ce458 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 5381b6434996da10706dd358928f98703ac0892c Original-Signed-off-by: David Hendricks <dhendrix@chromium.org> Original-Change-Id: Ib0cfaf1bb173a7150f7ff504b9f58a62eb82e781 Original-Reviewed-on: https://chromium-review.googlesource.com/302634 Reviewed-on: http://review.coreboot.org/12138 Tested-by: build bot (Jenkins) Reviewed-by: David Hendricks <dhendrix@chromium.org>
Diffstat (limited to 'src/soc/rockchip')
-rw-r--r--src/soc/rockchip/rk3288/clock.c2
-rw-r--r--src/soc/rockchip/rk3288/include/soc/clock.h1
2 files changed, 0 insertions, 3 deletions
diff --git a/src/soc/rockchip/rk3288/clock.c b/src/soc/rockchip/rk3288/clock.c
index 1d163bf38d..0df2aa74f9 100644
--- a/src/soc/rockchip/rk3288/clock.c
+++ b/src/soc/rockchip/rk3288/clock.c
@@ -79,12 +79,10 @@ static const struct pll_div cpll_init_cfg = PLL_DIVISORS(CPLL_HZ, 1, 2);
/* See linux/drivers/clk/rockchip/clk-rk3288.c for more APLL combinations */
static const struct pll_div apll_1800_cfg = PLL_DIVISORS(1800*MHz, 1, 1);
static const struct pll_div apll_1416_cfg = PLL_DIVISORS(1416*MHz, 1, 1);
-static const struct pll_div apll_1392_cfg = PLL_DIVISORS(1392*MHz, 1, 1);
static const struct pll_div apll_600_cfg = PLL_DIVISORS(600*MHz, 1, 2);
static const struct pll_div *apll_cfgs[] = {
[APLL_1800_MHZ] = &apll_1800_cfg,
[APLL_1416_MHZ] = &apll_1416_cfg,
- [APLL_1392_MHZ] = &apll_1392_cfg,
[APLL_600_MHZ] = &apll_600_cfg,
};
diff --git a/src/soc/rockchip/rk3288/include/soc/clock.h b/src/soc/rockchip/rk3288/include/soc/clock.h
index 39842a176c..a166a59325 100644
--- a/src/soc/rockchip/rk3288/include/soc/clock.h
+++ b/src/soc/rockchip/rk3288/include/soc/clock.h
@@ -31,7 +31,6 @@
enum apll_frequencies {
APLL_1800_MHZ,
APLL_1416_MHZ,
- APLL_1392_MHZ,
APLL_600_MHZ,
};