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authorShunqian Zheng <zhengsq@rock-chips.com>2016-05-11 15:18:17 +0800
committerMartin Roth <martinroth@google.com>2016-06-07 16:14:05 +0200
commit0d9839b3334d7769e1d89ebc68e01d91e5672c74 (patch)
treefed211c666724d2e53c90328d295fd246b2c4f12 /src/soc/rockchip
parent6724b1b6b46f7fbc21d80511177fca6080067d69 (diff)
downloadcoreboot-0d9839b3334d7769e1d89ebc68e01d91e5672c74.tar.xz
rockchip: gru: update the hynix lpddr3 config to run at 928MHz
Update the DDR config and DRAM driver to allow running at up to 928MHz. Kevin config/clock rate are not being changed, but Gru now runs at 928 MHz. BRANCH=none BUG=chrome-os-partner:51537 TEST=booted Kevin and Gru to Linux prompt. Ran stressapptest for 10 min on Gru, Change-Id: I66c1a171d5c7d05b2878c7bc5eaa0d436c7a1be2 Signed-off-by: Martin Roth <martinroth@chromium.org> Original-Commit-Id: 8baf0d82816a7ea1c4428e15caeefa2795d001f9 Original-Change-Id: I5e1d6d1025f10203da8f11afc3bbdf95f133c586 Original-Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com> Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/343984 Original-Reviewed-by: Stephen Barber <smbarber@chromium.org> Reviewed-on: https://review.coreboot.org/15027 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/rockchip')
-rw-r--r--src/soc/rockchip/rk3399/clock.c4
-rw-r--r--src/soc/rockchip/rk3399/sdram.c2
2 files changed, 5 insertions, 1 deletions
diff --git a/src/soc/rockchip/rk3399/clock.c b/src/soc/rockchip/rk3399/clock.c
index 6222b77730..ba66230e23 100644
--- a/src/soc/rockchip/rk3399/clock.c
+++ b/src/soc/rockchip/rk3399/clock.c
@@ -549,6 +549,10 @@ void rkclk_configure_ddr(unsigned int hz)
dpll_cfg = (struct pll_div)
{.refdiv = 1, .fbdiv = 100, .postdiv1 = 3, .postdiv2 = 1};
break;
+ case 928*MHz:
+ dpll_cfg = (struct pll_div)
+ {.refdiv = 1, .fbdiv = 116, .postdiv1 = 3, .postdiv2 = 1};
+ break;
default:
die("Unsupported SDRAM frequency, add to clock.c!");
}
diff --git a/src/soc/rockchip/rk3399/sdram.c b/src/soc/rockchip/rk3399/sdram.c
index 83c0ee6255..1536910e2c 100644
--- a/src/soc/rockchip/rk3399/sdram.c
+++ b/src/soc/rockchip/rk3399/sdram.c
@@ -819,7 +819,7 @@ void sdram_init(const struct rk3399_sdram_params *sdram_params)
if ((sdram_params->dramtype == DDR3
&& sdram_params->ddr_freq > 800*MHz) ||
(sdram_params->dramtype == LPDDR3
- && sdram_params->ddr_freq > 800*MHz) ||
+ && sdram_params->ddr_freq > 928*MHz) ||
(sdram_params->dramtype == LPDDR4
&& sdram_params->ddr_freq > 800*MHz))
die("SDRAM frequency is to high!");