diff options
| author | Subrata Banik <subrata.banik@intel.com> | 2016-08-05 18:25:55 +0530 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2016-08-11 16:03:29 +0200 |
| commit | c1645faeff3f128efcf411a98772ac9d327fc7aa (patch) | |
| tree | 46aeceb26234b91eaa7a762c7346fd2bc132d9a1 /src/soc/rockchip | |
| parent | d7127b09ae6ccd86f45d9c19cac3cb74d980af54 (diff) | |
| download | coreboot-c1645faeff3f128efcf411a98772ac9d327fc7aa.tar.xz | |
soc/intel/common: Add support for serial console based ACPI debug
This patch enables serial debug functionality for ASL code based on
UART type(legacy/LPSS).
From Skylake onwards all Intel platform uses LPSS based UART for serial
console hence provide option to redirect ASL log over LPSS UART.
Example:
Name (OBJ, 0x12)
APRT (OBJ)
APRT ("CORE BOOT")
Output:
0x12
CORE BOOT
BUG=none
BRANCH=none
TEST=Built and boot kunimitsu to ensure to be able to get ASL console log.
Change-Id: I18c65654b8eb1ac27af1f283d413376fd79d47db
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/16070
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/rockchip')
0 files changed, 0 insertions, 0 deletions