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authorElyes HAOUAS <ehaouas@noos.fr>2018-05-28 16:26:43 +0200
committerPatrick Georgi <pgeorgi@google.com>2018-06-04 09:20:52 +0000
commit05498a254d5364efb669f63aa4b042c91c123727 (patch)
tree21fe95cd426c1da7a2ea54f44bfcb1566731308d /src/soc/rockchip
parente7f4beca19d538c47208b8a1b984cf0e39ff02b4 (diff)
downloadcoreboot-05498a254d5364efb669f63aa4b042c91c123727.tar.xz
src/soc: Get rid of whitespace before tab
Change-Id: Ia024fb418f02d90c38b9a35ff819c607b9ac4965 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/26651 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/soc/rockchip')
-rw-r--r--src/soc/rockchip/rk3399/include/soc/mipi.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/rockchip/rk3399/include/soc/mipi.h b/src/soc/rockchip/rk3399/include/soc/mipi.h
index 457c51dd1e..f304d8fcd0 100644
--- a/src/soc/rockchip/rk3399/include/soc/mipi.h
+++ b/src/soc/rockchip/rk3399/include/soc/mipi.h
@@ -233,7 +233,7 @@ check_member(rk_mipi_regs, dsi_int_msk1, 0xc8);
#define THS_PRE_PROGRAM_EN BIT(7)
#define THS_ZERO_PROGRAM_EN BIT(6)
-#define PLL_BIAS_CUR_SEL_CAP_VCO_CONTROL 0x10
+#define PLL_BIAS_CUR_SEL_CAP_VCO_CONTROL 0x10
#define PLL_CP_CONTROL_PLL_LOCK_BYPASS 0x11
#define PLL_LPF_AND_CP_CONTROL 0x12
#define PLL_INPUT_DIVIDER_RATIO 0x17