diff options
| author | David Hendricks <dhendrix@chromium.org> | 2015-06-25 17:10:00 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-07-06 09:42:53 +0200 |
| commit | 1f440f60fbc99050ef24fe94b539564c93e56678 (patch) | |
| tree | 5a20b57d8830b1b0eb315808e2ba03a26d9aafd0 /src/soc/rockchip | |
| parent | cd500134b18fd579dd912df0a3c227458935d4fe (diff) | |
| download | coreboot-1f440f60fbc99050ef24fe94b539564c93e56678.tar.xz | |
veyron*: Kill SKIP_DISPLAY_INIT_HACK
Now that we have functioning display code for all platforms,
we can just get rid of this ugly hack used on non-Chromebook
veyrons.
BUG=none
BRANCH=none
TEST=built for Brain, Rialto, Mickey, Romy
Change-Id: Ibe248c7cc74940811345c249d66992d74fe85fe5
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 9c627b087ba9fc07b4ec4a6d55d2e0203bdd4ff5
Original-Change-Id: I946eddb4e8ce1dbaa20212a2bb417e71a31b2ba3
Original-Signed-off-by: David Hendricks <dhendrix@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/282049
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: http://review.coreboot.org/10785
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Diffstat (limited to 'src/soc/rockchip')
| -rw-r--r-- | src/soc/rockchip/rk3288/soc.c | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/src/soc/rockchip/rk3288/soc.c b/src/soc/rockchip/rk3288/soc.c index 6cdcc51a03..a13086a21f 100644 --- a/src/soc/rockchip/rk3288/soc.c +++ b/src/soc/rockchip/rk3288/soc.c @@ -39,11 +39,9 @@ static void soc_init(device_t dev) ram_resource(dev, 0, (uintptr_t)_dram/KiB, sdram_size_mb()*(MiB/KiB)); if (vboot_skip_display_init()) printk(BIOS_INFO, "Skipping display init.\n"); -#if !IS_ENABLED(CONFIG_SKIP_DISPLAY_INIT_HACK) else rk_display_init(dev, (uintptr_t)_framebuffer, _framebuffer_size); -#endif } static struct device_operations soc_ops = { |