summaryrefslogtreecommitdiff
path: root/src/soc/rockchip
diff options
context:
space:
mode:
authorElyes HAOUAS <ehaouas@noos.fr>2018-08-07 12:14:33 +0200
committerMartin Roth <martinroth@google.com>2018-08-09 15:49:53 +0000
commit809aeeed98104c016a5ee1cdd5009a84a5611d8e (patch)
treecba013b306c1e18d219f79db9b0c77799fd832b0 /src/soc/rockchip
parent6de6571f1c362c43dbfd04c79d1ddedcb953c724 (diff)
downloadcoreboot-809aeeed98104c016a5ee1cdd5009a84a5611d8e.tar.xz
src/soc: Fix typo
Change-Id: I8053d0f0863aa4d93692487f1ca802195c2d475f Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/27908 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/rockchip')
-rw-r--r--src/soc/rockchip/rk3288/clock.c2
-rw-r--r--src/soc/rockchip/rk3399/clock.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/rockchip/rk3288/clock.c b/src/soc/rockchip/rk3288/clock.c
index 74151e85cb..1b1c135d98 100644
--- a/src/soc/rockchip/rk3288/clock.c
+++ b/src/soc/rockchip/rk3288/clock.c
@@ -469,7 +469,7 @@ void rkclk_configure_i2s(unsigned int hz)
/* i2s source clock: gpll
i2s0_outclk_sel: clk_i2s
- i2s0_clk_sel: divider ouput from fraction
+ i2s0_clk_sel: divider output from fraction
i2s0_pll_div_con: 0*/
write32(&cru_ptr->cru_clksel_con[4],
RK_CLRSETBITS(1 << 15 | 1 << 12 | 3 << 8 | 0x7f << 0,
diff --git a/src/soc/rockchip/rk3399/clock.c b/src/soc/rockchip/rk3399/clock.c
index 5422deb5cf..0b8c83f90e 100644
--- a/src/soc/rockchip/rk3399/clock.c
+++ b/src/soc/rockchip/rk3399/clock.c
@@ -804,7 +804,7 @@ void rkclk_configure_i2s(unsigned int hz)
int v;
/**
- * clk_i2s0_sel: divider ouput from fraction
+ * clk_i2s0_sel: divider output from fraction
* clk_i2s0_pll_sel source clock: cpll
* clk_i2s0_div_con: 1 (div+1)
*/