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| author | Edward O'Callaghan <eocallaghan@alterapraxis.com> | 2014-12-26 12:36:47 +1100 |
|---|---|---|
| committer | Edward O'Callaghan <eocallaghan@alterapraxis.com> | 2014-12-26 09:16:46 +0100 |
| commit | 9b152b2a5565139039eaf4273baddb0aef2e1bb3 (patch) | |
| tree | 0abd8f1476656676178e32e4b5670ffbb2cc3696 /src/soc/samsung/exynos5250 | |
| parent | f679cfe429637ab5171a6c3453971ceb8da82800 (diff) | |
| download | coreboot-9b152b2a5565139039eaf4273baddb0aef2e1bb3.tar.xz | |
soc/samsung/exynos5250/clock.c: Trivial whitespace fixes
Reduce difference with exynos5420/clock.c by fixing some whitespace
and an include directive.
Change-Id: Ifbdd61c8300f3988f5f729fe7d6124ac8a9b7821
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/7926
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Diffstat (limited to 'src/soc/samsung/exynos5250')
| -rw-r--r-- | src/soc/samsung/exynos5250/clock.c | 8 |
1 files changed, 3 insertions, 5 deletions
diff --git a/src/soc/samsung/exynos5250/clock.c b/src/soc/samsung/exynos5250/clock.c index 8a731be2a3..1de2ab2420 100644 --- a/src/soc/samsung/exynos5250/clock.c +++ b/src/soc/samsung/exynos5250/clock.c @@ -19,11 +19,11 @@ #include <assert.h> #include <stdlib.h> +#include <timer.h> #include <arch/io.h> #include <console/console.h> #include "clk.h" #include "periph.h" -#include "timer.h" /* input clock of PLL: SMDK5250 has 24MHz input clock */ #define CONFIG_SYS_CLK_FREQ 24000000 @@ -635,12 +635,10 @@ int clock_epll_set_rate(unsigned long rate) end = current; mono_time_add_msecs(&end, TIMEOUT_EPLL_LOCK); - while (!(readl(&exynos_clock->epll_con0) & + while (!(readl(&exynos_clock->epll_con0) & (0x1 << EXYNOS5_EPLLCON0_LOCKED_SHIFT))) { if (mono_time_after(¤t, &end)) { - printk(BIOS_DEBUG, - "%s: Timeout waiting for EPLL lock\n", - __func__); + printk(BIOS_DEBUG, "%s: Timeout waiting for EPLL lock\n", __func__); return -1; } timer_monotonic_get(¤t); |